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Mohan Vishwanath
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1990 – 1999
- 1998
- [j6]Robert Michael Owens, Mohan Vishwanath:
A Very Efficient Storage Structure for DWT and IDWT Filters. J. VLSI Signal Process. 19(3): 215-225 (1998) - 1997
- [c17]Daniel Greene, Mohan Vishwanath, F. Frances Yao, Tong Zhang:
A progressive Ziv-Lempel algorithm for image compression. SEQUENCES 1997: 136-144 - 1996
- [j5]Manjit Borah, Chetana Nagendra, Mohan Vishwanath, Robert Michael Owens, Mary Jane Irwin:
An optimal time multiplication free algorithm for edge detection on a mesh. J. VLSI Signal Process. 13(1): 67-75 (1996) - [j4]Chaitali Chakrabarti, Mohan Vishwanath, Robert Michael Owens:
Architectures for wavelet transforms: A survey. J. VLSI Signal Process. 14(2): 171-192 (1996) - [c16]Mohan Vishwanath, Robert Michael Owens:
A Common Architecture For The DWT and IDWT. ASAP 1996: 193-198 - [c15]Rajan L. Joshi, Mohan Vishwanath:
Improving the performance of hierarchical vector quantization using segmentation. ICIP (3) 1996: 427-430 - [c14]Navin Chaddha, Mohan Vishwanath:
A low power video encoder with power, memory and bandwidth scalability. VLSI Design 1996: 358-363 - 1995
- [j3]Chaitali Chakrabarti, Mohan Vishwanath:
Efficient realizations of the discrete and continuous wavelet transforms: from single chip implementations to mappings on SIMD array computers. IEEE Trans. Signal Process. 43(3): 759-771 (1995) - [c13]Navin Chaddha, Mohan Vishwanath, Philip A. Chou:
Hierarchical Vector Quantization of Perceptually Weighted Block Transforms. Data Compression Conference 1995: 3-12 - [c12]Chaitali Chakrabarti, Mohan Vishwanath, Robert Michael Owens:
A survey of architectures for the discrete and continuous wavelet transforms. ICASSP 1995: 2849-2852 - 1994
- [j2]Mohan Vishwanath:
The recursive pyramid algorithm for the discrete wavelet transform. IEEE Trans. Signal Process. 42(3): 673-676 (1994) - [c11]Mohan Vishwanath:
Algorithms and architectures for hierarchical compression of video. ASAP 1994: 10-21 - [c10]Mohan Vishwanath, Chaitali Chakrabarti:
A VLSI architecture for real-time hierarchical encoding/decoding of video using the wavelet transform. ICASSP (2) 1994: 401-404 - [c9]Mohan Vishwanath, Philip A. Chou:
An Efficient Algorithm for Hierarchical Compression of Video. ICIP (3) 1994: 275-279 - 1993
- [j1]Robert Michael Owens, Thomas P. Kelliher, Mary Jane Irwin, Mohan Vishwanath, Raminder Singh Bajwa, Wen-Lin Yang:
The design and implementation of the Arithmetic Cube II, a VLSI signal processing system. IEEE Trans. Very Large Scale Integr. Syst. 1(4): 491-502 (1993) - [c8]Chen-Mi Wu, Mohan Vishwanath, Robert Michael Owens, Mary Jane Irwin:
A new blocked IIR algorithm. ICASSP (3) 1993: 113-116 - [c7]Chetana Nagendra, Manjit Borah, Mohan Vishwanath, Robert Michael Owens, Mary Jane Irwin:
Edge detection using fine-grained parallelism in VLSI. ICASSP (1) 1993: 401-404 - 1992
- [c6]Robert Michael Owens, Mary Jane Irwin, Thomas P. Kelliher, Mohan Vishwanath, Raminder Singh Bajwa:
Implementing a family of high performance, micrograined architectures. ASAP 1992: 191-205 - [c5]Mohan Vishwanath, Robert Michael Owens, Mary Jane Irwin:
Discrete wavelet transforms in VLSI. ASAP 1992: 218-229 - [c4]Mohan Vishwanath, Robert Michael Owens:
An AT2 lower bound for wavelet transforms in VLSI. ICASSP 1992: 649-652 - [c3]Mohan Vishwanath, Robert Michael Owens, Mary Jane Irwin:
ECube: An Efficient Architecture for Analyzing Time-Varying Spectra. VLSI Design 1992: 221-226 - 1991
- [c2]Mohan Vishwanath, Robert Michael Owens, Mary Jane Irwin:
The Arithmetic Cube: error analysis and simulation. ASAP 1991: 129-143 - [c1]Mary Jane Irwin, Robert Michael Owens, Thomas P. Kelliher, Kin-Ki Leung, Mohan Vishwanath:
The arithmetic cube II: a second generation VLSI DSP processor. ICASSP 1991: 1125-1128
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