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Ulrich Brenner
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- affiliation: University of Bonn, Germany
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2020 – today
- 2024
- [j11]Judith Brecklinghaus, Ulrich Brenner, Oliver Kiss:
Bounds on soft rectangle packing ratios. Comput. Geom. 119: 102078 (2024) - [i5]Ulrich Brenner, Anna Silvanus:
Faster Linear-Size And-Or Path and Adder Circuits. CoRR abs/2405.12765 (2024) - [i4]Ulrich Brenner, Benjamin David Görg:
Delay-Optimum Adder Circuits with Linear Size. CoRR abs/2409.06634 (2024) - 2023
- [j10]Ulrich Brenner, Anna Silvanus:
BonnLogic: Delay optimization by And-Or Path restructuring. Integr. 89: 123-133 (2023) - 2022
- [j9]Ulrich Brenner, Anna Silvanus, Jannik Silvanus:
Constructing depth-optimum circuits for adders and And-Or paths. Discret. Appl. Math. 310: 10-31 (2022) - [c7]Ulrich Brenner, Anna Silvanus:
Delay Optimization of Combinational Logic by AND-OR Path Restructuring. ASP-DAC 2022: 403-409 - 2020
- [i3]Ulrich Brenner, Anna Hermann:
Delay Optimization of Combinational Logic by And-Or Path Restructuring. CoRR abs/2009.08844 (2020) - [i2]Ulrich Brenner, Anna Hermann, Jannik Silvanus:
Constructing Depth-Optimum Circuits for Adders and AND-OR Paths. CoRR abs/2012.05550 (2020)
2010 – 2019
- 2019
- [j8]Ulrich Brenner, Anna Hermann:
Faster Carry Bit Computation for Adder Circuits with Prescribed Arrival Times. ACM Trans. Algorithms 15(4): 45:1-45:23 (2019) - 2018
- [j7]Ulrich Brenner:
γ-Soft packings of rectangles. Comput. Geom. 70-71: 49-64 (2018) - 2017
- [i1]Ulrich Brenner, Anna Hermann:
Faster Adder Circuits for Inputs with Prescribed Arrival Times. CoRR abs/1710.08267 (2017) - 2015
- [c6]Ulrich Brenner, Anna Hermann, Nils Hoppmann, Philipp Ochsendorf:
BonnPlace: A Self-Stabilizing Placement Framework. ISPD 2015: 9-16 - 2013
- [j6]Ulrich Brenner:
BonnPlace Legalization: Minimizing Movement by Iterative Augmentation. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 32(8): 1215-1227 (2013) - 2012
- [c5]Ulrich Brenner:
VLSI legalization with minimum perturbation by iterative augmentation. DATE 2012: 1385-1390
2000 – 2009
- 2008
- [j5]Ulrich Brenner:
A faster polynomial algorithm for the unbalanced Hitchcock transportation problem. Oper. Res. Lett. 36(4): 408-413 (2008) - [j4]Ulrich Brenner, Markus Struzyna, Jens Vygen:
BonnPlace: Placement of Leading-Edge Chips by Advanced Combinatorial Algorithms. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 27(9): 1607-1620 (2008) - [r1]Ulrich Brenner, Jens Vygen:
Analytical Methods in Placement. Handbook of Algorithms for Physical Design Automation 2008 - 2006
- [b1]Ulrich Brenner:
Theory and Practice of VLSI Placement. University of Bonn, Germany, 2006 - 2005
- [c4]Ulrich Brenner, Markus Struzyna:
Faster and better global placement by a new transportation algorithm. DAC 2005: 591-596 - 2004
- [j3]Ulrich Brenner, Jens Vygen:
Legalizing a placement with minimum total movement. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 23(12): 1597-1613 (2004) - [c3]Ulrich Brenner, Anna Pauli, Jens Vygen:
Almost optimum placement legalization by minimum cost flow and dynamic programming. ISPD 2004: 2-9 - 2003
- [j2]Ulrich Brenner, André Rohe:
An effective congestion-driven placement framework. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 22(4): 387-394 (2003) - 2002
- [c2]Ulrich Brenner, André Rohe:
An effective congestion driven placement framework. ISPD 2002: 6-11 - 2001
- [j1]Ulrich Brenner, Jens Vygen:
Worst-case ratios of networks in the rectilinear plane. Networks 38(3): 126-139 (2001) - 2000
- [c1]Ulrich Brenner, Jens Vygen:
Faster Optimal Single-Row Placement with Fixed Ordering. DATE 2000: 117-121
Coauthor Index
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