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Teruo Tanaka
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2020 – today
- 2024
- [j3]Akihiro Fujii, Teruo Tanaka, Kengo Nakajima:
Light Weight Coarse Grid Aggregation for Smoothed Aggregation Algebraic Multigrid Solver. IEEE Access 12: 57345-57355 (2024) - 2023
- [c20]Sorataro Fujika, Yuga Yajima, Teruo Tanaka, Akihiro Fujii, Yuka Kato, Satoshi Ohshima, Takahiro Katagiri:
Parallelization of Automatic Tuning for Hyperparameter Optimization of Pedestrian Route Prediction Applications using Machine Learning. HPC Asia 2023: 96-105
2010 – 2019
- 2019
- [j2]Akihiro Fujii, Shigeo Kaneko, Teruo Tanaka, Takeshi Iwashita:
Time Segment Correction Method for Parallel Time Integration. J. Inf. Process. 27: 822-830 (2019) - [c19]Ryo Muro, Akihiro Fujii, Teruo Tanaka:
Acceleration of Symmetric Sparse Matrix-Vector Product using Improved Hierarchical Diagonal Blocking Format. HPC Asia 2019: 63-70 - 2018
- [c18]Naoya Nomura, Akihiro Fujii, Teruo Tanaka, Osni Marques, Kengo Nakajima:
Algebraic Multigrid Solver Using Coarse Grid Aggregation with Independent Aggregation. IPDPS Workshops 2018: 1104-1112 - 2017
- [c17]Masayoshi Mochizuki, Akihiro Fujii, Teruo Tanaka:
Fast Multidimensional Performance Parameter Estimation with Multiple One-Dimensional d-Spline Parameter Search. IPDPS Workshops 2017: 1426-1433 - [c16]Guning Fan, Masayoshi Mochizuki, Akihiro Fujii, Teruo Tanaka, Takahiro Katagiri:
D-Spline Performance Tuning Method Flexibly Responsive to Execution Time Perturbation. PPAM (1) 2017: 381-391 - 2016
- [c15]Toshiaki Hishinuma, Takuma Sakakibara, Akihiro Fujii, Teruo Tanaka, Shoichi Hirasawa:
Xev-GMP: Automatic Code Generation for GMP Multiple-Precision Code from C Code. CSE/EUC/DCABES 2016: 295-298 - [c14]Toshiaki Hishinuma, Hidehiko Hasegawa, Teruo Tanaka:
SIMD Parallel Sparse Matrix-Vector and Transposed-Matrix-Vector Multiplication in DD Precision. VECPAR 2016: 21-34 - [c13]Naoya Nomura, Akihiro Fujii, Teruo Tanaka, Kengo Nakajima, Osni Marques:
Performance Analysis of SA-AMG Method by Setting Extracted Near-Kernel Vectors. VECPAR 2016: 52-63 - 2015
- [c12]Riku Murata, Jun Irie, Akihiro Fujii, Teruo Tanaka, Takahiro Katagiri:
Enhancement of Incremental Performance Parameter Estimation on ppOpen-AT. MCSoC 2015: 203-210 - [c11]Yosuke Kumagai, Akihiro Fujii, Teruo Tanaka, Yusuke Hirota, Takeshi Fukaya, Toshiyuki Imamura, Reiji Suda:
Performance Analysis of the Chebyshev Basis Conjugate Gradient Method on the K Computer. PPAM (1) 2015: 74-85 - 2014
- [j1]Teruo Tanaka, Ryo Otsuka, Akihiro Fujii, Takahiro Katagiri, Toshiyuki Imamura:
Implementation of d-Spline-based incremental performance parameter estimation method with ppOpen-AT. Sci. Program. 22(4): 299-307 (2014) - [c10]Yuki Sumiyoshi, Akihiro Fujii, Akira Nukada, Teruo Tanaka:
Mixed-Precision AMG method for Many Core Accelerators. EuroMPI/ASIA 2014: 127 - 2013
- [c9]Toshiaki Hishinuma, Akihiro Fujii, Teruo Tanaka, Hidehiko Hasegawa:
AVX Acceleration of DD Arithmetic Between a Sparse Matrix and Vector. PPAM (1) 2013: 622-631
2000 – 2009
- 2006
- [c8]Teruo Tanaka, Takahiro Katagiri, Toshitsugu Yuba:
d-Spline Based Incremental Parameter Estimation in Automatic Performance Tuning. PARA 2006: 986-995
1990 – 1999
- 1998
- [c7]Frederico B. Maciel, Nobutoshi Sagawa, Teruo Tanaka:
Dynamic Gateways: A Novel Approach to Improve Networking Performance and Availability on Parallel Servers. HPCN Europe 1998: 678-687 - 1997
- [c6]Yoshiko Yasuda, Hiroaki Fujii, Hideya Akashi, Yasuhiro Inagami, Teruo Tanaka, Junji Nakagoshi, Hideo Wada, Tsutomu Sumimoto:
Deadlock-Free Fault-tolerant Routing in the Multi-dimensional Crossbar Network and Its Implementation for the Hitachi SR2201. IPPS 1997: 346-352 - 1994
- [c5]Katsuyoshi Kitai, Tadaaki Isobe, Tadayuki Sakakibara, Shigeko Yazawa, Yoshiko Tamaki, Teruo Tanaka, Kouichi Ishii:
Distributed storage control unit for the Hitachi S-3800 multivector supercomputer. International Conference on Supercomputing 1994: 1-10 - [c4]Tadayuki Sakakibara, Katsuyoshi Kitai, Tadaaki Isobe, Shigeko Yazawa, Teruo Tanaka, Yoshiko Tamaki, Yasuhiro Inagami:
An interprocessor memory access arbitrating scheme for the S-3800 vector supercomputer. ISPAN 1994: 262-269 - 1993
- [c3]Tadayuki Sakakibara, Katsuyoshi Kitai, Tadaaki Isobe, Shigeko Yazawa, Teruo Tanaka, Yasuhiro Inagami, Yoshiko Tamaki:
Scalable Parallel Memory Architecture with a Skew Scheme. International Conference on Supercomputing 1993: 157-166 - [c2]Katsuyoshi Kitai, Tadaaki Isobe, Yoshikazu Tanaka, Yoshiko Tamaki, Masakazu Fukagawa, Teruo Tanaka, Yasuhiro Inagami:
Parallel Processing Architecture for the Hitachi S-3800 Shared-Memory Vector Multiprocessor. International Conference on Supercomputing 1993: 288-297 - 1992
- [c1]Naoki Hamanaka, Junji Nakagoshi, Teruo Tanaka:
Reducing Network Hardware Quantity by Employing Multi-Processor Cluster Structure in Distributed Memory Parallel Processors. CONPAR 1992: 25-30
Coauthor Index
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