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Mino Kim
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2020 – today
- 2024
- [c6]Yangho Seo, Jihee Choi, Sunki Cho, Hyunwook Han, Wonjong Kim, Gyeongha Ryu, Jungil Ahn, Younga Cho, Sungphil Choi, Seohee Lee, Wooju Lee, Chaehyuk Lee, Kiup Kim, Seongseop Lee, Sangbeom Park, Minjun Choi, Sungwoo Lee, Mino Kim, Taekyun Shin, Hyeongsoo Jeong, Hyunseung Kim, Houk Song, Yunsuk Hong, Seokju Yoon, Giwook Park, Hokeun You, Changkyu Choi, Hae-Kang Jung, Joohwan Cho, Jonghwan Kim:
13.8 A 1a-nm 1.05V 10.5Gb/s/pin 16Gb LPDDR5 Turbo DRAM with WCK Correction Strategy, a Voltage-Offset-Calibrated Receiver and Parasitic Capacitance Reduction. ISSCC 2024: 246-248 - 2021
- [j6]Hyeongjun Ko
, Mino Kim, Hyunkyu Park
A Controller PHY for Managed DRAM Solution With Damping-Resistor-Aided Pulse-Based Feed-Forward Equalizer. IEEE J. Solid State Circuits 56(8): 2563-2573 (2021) - 2020
- [j5]Yong-Un Jeong
A 9Gb/s Wide Output Range Transmitter With 2D Binary-Segmented Driver and Dual-Loop Calibration for Intra-Panel Interfaces. IEEE Trans. Circuits Syst. II Express Briefs 67-II(9): 1589-1593 (2020)
2010 – 2019
- 2018
- [j4]Joo-Hyung Chae
A 3.2 Gb/s 16-Channel Transmitter for Intra-Panel Interfaces, With Independently Controllable Output Swing, Common-Mode Voltage, and Equalization. IEEE Access 6: 78055-78064 (2018) - [j3]Mino Kim, Joo-Hyung Chae
A 4266 Mb/s/pin LPDDR4 Interface With An Asynchronous Feedback CTLE and An Adaptive 3-Step Eye Detection Algorithm for Memory Controller. IEEE Trans. Circuits Syst. II Express Briefs 65-II(12): 1894-1898 (2018) - 2017
- [c5]Jihwan Park, Gi-Moon Hong, Mino Kim, Joo-Hyung Chae
A 0.13pJ/bit, referenceless transceiver with clock edge modulation for a wired intra-BAN communication. ISLPED 2017: 1-6 - [c4]Minchang Kim, Jihwan Park, Joo-Hyung Chae
An 8Gb/s adaptive DFE with level calibration using training data pattern for mobile DRAM interface. ISOCC 2017: 286-287 - 2016
- [j2]Hyunjoong Lee, Daeyong Shim, Cyuyeol Rhee
A Sub-1.0-V On-Chip CMOS Thermometer With a Folded Temperature Sensor for Low-Power Mobile DRAM. IEEE Trans. Circuits Syst. II Express Briefs 63-II(6): 553-557 (2016) - [c3]Jae-Whan Lee, Mino Kim, Jihwan Park, Gi-Moon Hong, Suhwan Kim:
Phase shift keying demodulator with decision feedback phase-locked loop. ISCAS 2016: 1550-1553 - 2015
- [c2]Joo-Hyung Chae
A 1.74mW/GHz 0.11-2.5GHz fast-locking, jitter-reducing, 180° phase-shift digital DLL with a window phase detector for LPDDR4 memory controllers. A-SSCC 2015: 1-4 - 2013
- [c1]Mino Kim, Woo-Yeol Shin, Gi-Moon Hong, Jihwan Park, Joo-Hyung Chae
High-resolution and wide-dynamic range time-to-digital converter with a multi-phase cyclic Vernier delay line. ESSCIRC 2013: 311-314 - 2012
- [j1]Rahul Singh, Gi-Moon Hong, Mino Kim, Jihwan Park, Woo-Yeol Shin, Suhwan Kim:
Static-switching pulse domino: A switching-aware design technique for wide fan-in dynamic multiplexers. Integr. 45(3): 253-262 (2012)
Coauthor Index
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