Scalable Synthesis of PCHB-WCHB Hybrid Quasi-Delay Insensitive Circuits. - Lai, Yi-Hsiang; Chuang, Chi-Chuan; Jiang, Jie-Hong R. (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2016)

A General Framework for Efficient Performance Analysis of Acyclic Asynchronous Pipelines. - Lai, Yi-Hsiang; Chuang, Chi-Chuan; Jiang, Jie-Hong R. (2015)

Synthesis of PCHB-WCHB Hybrid Quasi-Delay Insensitive Circuits. - Chuang, Chi-Chuan; Lai, Yi-Hsiang; Jiang, Jie-Hong R. (2014)