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Yu Ting Chen

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2020 – today

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2022
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  - journals/tc/ChengFCAWC22
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Jianyi Cheng, Shane T. Fleming, Yu Ting Chen, Jason Helge Anderson, John Wickerson, George A. Constantinides:
Efficient Memory Arbitration in High-Level Synthesis From Multi-Threaded Code. IEEE Trans. Computers 71(4): 933-946 (2022)

2010 – 2019

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2019
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  - conf/fpga/ChengFCAC19
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Jianyi Cheng, Shane T. Fleming, Yu Ting Chen, Jason Helge Anderson, George A. Constantinides:
EASY: Efficient Arbiter SYnthesis from Multi-threaded Code. FPGA 2019: 142-151
[c3]
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  - conf/icfpt/ChenKLHA19
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Yu Ting Chen, Jin Hee Kim, Kexin Li, Graham Hoyes, Jason Helge Anderson:
High-Level Synthesis Techniques to Generate Deeply Pipelined Circuits for FPGAs with Registered Routing. FPT 2019: 375-378
2017
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Yu Ting Chen, Jason Helge Anderson:
Automated generation of banked memory architectures in the high-level synthesis of multi-threaded software. FPL 2017: 1-8
2016
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Razvan Nane, Vlad Mihai Sima, Christian Pilato, Jongsok Choi, Blair Fort, Andrew Canis, Yu Ting Chen, Hsuan Hsiao, Stephen Dean Brown, Fabrizio Ferrandi, Jason Helge Anderson, Koen Bertels:
A Survey and Evaluation of FPGA High-Level Synthesis Tools. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 35(10): 1591-1604 (2016)
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Andrew Canis, Jongsok Choi, Blair Fort, Bain Syrowik, Ruolong Lian, Yu Ting Chen, Hsuan Hsiao, Jeffrey B. Goeders, Stephen Dean Brown, Jason Helge Anderson:
LegUp High-Level Synthesis. FPGAs for Software Programmers 2016: 175-190
2014
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  - conf/euc/FortCCCLHCHSCBA14
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Blair Fort, Andrew Canis, Jongsok Choi, Nazanin Calagar, Ruolong Lian, Stefan Hadjis, Yu Ting Chen, Mathew Hall, Bain Syrowik, Tomasz S. Czajkowski, Stephen Dean Brown, Jason Helge Anderson:
Automating the Design of Processor/Accelerator Embedded Systems with LegUp High-Level Synthesis. EUC 2014: 120-129

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