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Ganesh Gore

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2020 – today

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2023
[j2]
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Ganesh Gore, Xifan Tang, Pierre-Emmanuel Gaillardon:
A Scalable and Area-Efficient Configuration Circuitry for Semi-Custom FPGA Design. IEEE Trans. Very Large Scale Integr. Syst. 31(8): 1128-1139 (2023)
[j1]
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Jitendra Bhandari, Abdul Khader Thalakkattu Moosa, Benjamin Tan, Christian Pilato, Ganesh Gore, Xifan Tang, Scott Temple, Pierre-Emmanuel Gaillardon, Ramesh Karri:
Not All Fabrics Are Created Equal: Exploring eFPGA Parameters for IP Redaction. IEEE Trans. Very Large Scale Integr. Syst. 31(10): 1459-1471 (2023)
[c12]
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  - conf/apccas/MishraRGT23
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Anubhav Mishra, Nanditha Rao, Ganesh Gore, Xifan Tang:
Architectural Exploration of Heterogeneous FPGAs for Performance Enhancement of ML Benchmarks. APCCAS 2023: 232-235
[c11]
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  - conf/isvlsi/BrownGG23
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Grant Brown, Ganesh Gore, Pierre-Emmanuel Gaillardon:
Performance Optimized Clock Tree Embedding for Auto-Generated FPGAs. ISVLSI 2023: 1-6
2021
[c10]
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  - conf/fpl/TangGBG21
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Xifan Tang, Ganesh Gore, Grant Brown, Pierre-Emmanuel Gaillardon:
Taping out an FPGA in 24 hours with OpenFPGA: The SOFA Project. FPL 2021: 400
[c9]
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Jitendra Bhandari, Abdul Khader Thalakkattu Moosa, Benjamin Tan, Christian Pilato, Ganesh Gore, Xifan Tang, Scott Temple, Pierre-Emmanuel Gaillardon, Ramesh Karri:
Exploring eFPGA-based Redaction for IP Protection. ICCAD 2021: 1-9
[c8]
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Ganesh Gore, Xifan Tang, Pierre-Emmanuel Gaillardon:
A Scalable and Robust Hierarchical Floorplanning to Enable 24-hour Prototyping for 100k-LUT FPGAs. ISPD 2021: 135-142
[i2]
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  - journals/corr/abs-2110-13346
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Jitendra Bhandari, Abdul Khader Thalakkattu Moosa, Benjamin Tan, Christian Pilato, Ganesh Gore, Xifan Tang, Scott Temple, Pierre-Emmanuel Gaillardon, Ramesh Karri:
Exploring eFPGA-based Redaction for IP Protection. CoRR abs/2110.13346 (2021)
[i1]
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  - journals/corr/abs-2111-04222
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Jitendra Bhandari, Abdul Khader Thalakkattu Moosa, Benjamin Tan, Christian Pilato, Ganesh Gore, Xifan Tang, Scott Temple, Pierre-Emmanuel Gaillardon, Ramesh Karri:
Not All Fabrics Are Created Equal: Exploring eFPGA Parameters For IP Redaction. CoRR abs/2111.04222 (2021)
2020
[c7]
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  - conf/date/TangGCGG20
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Xifan Tang, Edouard Giacomin, Patsy Cadareanu, Ganesh Gore, Pierre-Emmanuel Gaillardon:
A RRAM-based FPGA for Energy-efficient Edge Computing. DATE 2020: 144-

2010 – 2019

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2019
[c6]
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Ganesh Gore, Patsy Cadareanu, Edouard Giacomin, Pierre-Emmanuel Gaillardon:
A Predictive Process Design Kit for Three-Independent-Gate Field-Effect Transistors. VLSI-SoC 2019: 172-177
[c5]
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Patsy Cadareanu, Ganesh Gore, Edouard Giacomin, Pierre-Emmanuel Gaillardon:
A Predictive Process Design Kit for Three-Independent-Gate Field-Effect Transistors. VLSI-SoC (Selected Papers) 2019: 307-322
2018
[c4]
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  - conf/icacci/GadreRWBGJ18
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Sarthak Gadre, Vedashree Rawalgaonkar, Mandar Warde, Dilip Balasubramanian, Ganesh Gore, Jonathan Joshi:
Implementation and Design Issues for Augmented Reality Applications on Mobile Platforms. ICACCI 2018: 1341-1344
2017
[c3]
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  - conf/icacci/MhapankarVPGSGJ17
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Shantanu Mhapankar, Gauresh Vanjare, Aditya Pappu, Sarthak Gadre, Abhisha Sheth, Ganesh Gore, Jonathan Joshi:
Implementing an efficient lightweight modbus protocol over a wireless sensor network. ICACCI 2017: 473-479
[c2]
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  - conf/mwscas/KulkarniNPGGJ17
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Janhavi Kulkarni, Karan Nair, Aditya Pappu, Sarthak Gadre, Ganesh Gore, Jonathan Joshi:
Using On-chip cryptographic units for security in wireless sensor networks. MWSCAS 2017: 1252-1255
2015
[c1]
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  - conf/icacci/DoshiPDGJSR15
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Jinalkumar Doshi, Pratiksha Patil, Zalak Dave, Ganesh Gore, Jonathan Joshi, Reena Sonkusare, Surendra S. Rathod:
Implementing a cloud based Xilinx ISE FPGA design platform for integrated remote labs. ICACCI 2015: 533-537

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