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Luong Dinh Hung
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2000 – 2009
- 2007
- [c6]Luong Dinh Hung, Hidetsugu Irie, Masahiro Goshima, Shuichi Sakai:
Utilization of SECDED for soft error and variation-induced defect tolerance in caches. DATE 2007: 1134-1139 - 2006
- [j2]Naoya Hatta, Niko Demus Barli, Chitaka Iwama, Luong Dinh Hung, Daisuke Tashiro, Shuichi Sakai, Hidehiko Tanaka:
Bus Serialization for Reducing Power Consumption. Inf. Media Technol. 1(2): 686-694 (2006) - [j1]Luong Dinh Hung, Shuichi Sakai:
Dynamic Estimation of Task Level Parallelism with Operating System Support. Inf. Media Technol. 1(2): 860-868 (2006) - [c5]Luong Dinh Hung, Masahiro Goshima, Shuichi Sakai:
SEVA: A Soft-Error- and Variation-Aware Cache Architecture. PRDC 2006: 47-54 - 2005
- [c4]Luong Dinh Hung, Masahiro Goshima, Shuichi Sakai:
Mitigating Soft Errors in Highly Associative Cache with CAM-based Tag. ICCD 2005: 342-350 - [c3]Luong Dinh Hung, Shuichi Sakai:
Dynamic Estimation of Task Level Parallelism with Operating System Support. ISPAN 2005: 358-363 - 2003
- [c2]Hideyuki Miura, Luong Dinh Hung, Chitaka Iwama, Daisuke Tashiro, Niko Demus Barli, Shuichi Sakai, Hidehiko Tanaka:
Compiler-Assisted Thread Level Control Speculation. Euro-Par 2003: 603-608 - [c1]Yoshimitsu Yanagawa, Luong Dinh Hung, Chitaka Iwama, Niko Demus Barli, Shuichi Sakai, Hidehiko Tanaka:
Complexity Analysis of a Cache Controller for Speculative Multithreading Chip Multiprocessors. HiPC 2003: 393-404
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last updated on 2024-08-28 22:30 CEST by the dblp team
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