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Elvira Teran
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2020 – today
- 2023
- [j1]Daniel A. Jiménez
, Elvira Teran
Last-Level Cache Insertion and Promotion Policy in the Presence of Aggressive Prefetching. IEEE Comput. Archit. Lett. 22(1): 17-20 (2023) - 2022
- [i1]Nathan Gober, Gino Chacon, Lei Wang
The Championship Simulator: Architectural Simulation for Education and Competition. CoRR abs/2210.14324 (2022)
2010 – 2019
- 2019
- [c6]Eshan Bhatia, Gino Chacon, Seth H. Pugsley, Elvira Teran, Paul V. Gratz
Perceptron-based prefetch filtering. ISCA 2019: 1-13 - 2018
- [c5]Elvira Teran
Flexible associativity for DRAM caches. CF 2018: 88-96 - 2017
- [c4]Jinchun Kim, Elvira Teran
Kill the Program Counter: Reconstructing Program Behavior in the Processor Cache Hierarchy. ASPLOS 2017: 737-749 - [c3]Daniel A. Jiménez
Multiperspective reuse prediction. MICRO 2017: 436-448 - 2016
- [c2]Elvira Teran
Minimal disturbance placement and promotion. HPCA 2016: 201-211 - [c1]Elvira Teran
Perceptron learning for reuse prediction. MICRO 2016: 2:1-2:12
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last updated on 2025-01-20 22:57 CET by the dblp team
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