<?xml version="1.0"?>
<dblpperson name="Behnam S. Arad" pid="20/3749" n="13">
<person key="homepages/20/3749" mdate="2009-06-10">
<author pid="20/3749">Behnam S. Arad</author>
</person>
<r><inproceedings key="conf/cata/LeMA19" mdate="2021-08-15">
<author pid="266/0426">Thomas Le</author>
<author pid="51/2927">William Mitchell</author>
<author pid="20/3749">Behnam S. Arad</author>
<title>Customized Intrusion Detection Based on a Database Audit Log.</title>
<pages>117-126</pages>
<year>2019</year>
<booktitle>CATA</booktitle>
<ee type="oa">https://doi.org/10.29007/8sb6</ee>
<crossref>conf/cata/2019</crossref>
<url>db/conf/cata/cata2019.html#LeMA19</url>
</inproceedings>
</r>
<r><inproceedings key="conf/cata/HakhamaneshiA10" mdate="2010-06-12">
<author pid="35/7434">Bahram Hakhamaneshi</author>
<author pid="20/3749">Behnam S. Arad</author>
<title>A Hardware Implementation of the Advanced Encryption Standard (AES) Algorithm using SystemVerilog.</title>
<pages>224-227</pages>
<year>2010</year>
<booktitle>CATA</booktitle>
<crossref>conf/cata/2010</crossref>
<url>db/conf/cata/cata2010.html#HakhamaneshiA10</url>
</inproceedings>
</r>
<r><inproceedings key="conf/cata/AradC08" mdate="2021-08-09">
<author pid="20/3749">Behnam S. Arad</author>
<author pid="02/2689">Hong Chang</author>
<title>A Behavioral Simulator for PCI-Express Transaction Layer.</title>
<pages>275-280</pages>
<year>2008</year>
<booktitle>CATA</booktitle>
<crossref>conf/cata/2008</crossref>
<url>db/conf/cata/cata2008.html#AradC08</url>
</inproceedings>
</r>
<r><inproceedings key="conf/cata/MahmoudA07" mdate="2021-08-09">
<author pid="64/2149">Mohamed Mahmoud</author>
<author pid="20/3749">Behnam S. Arad</author>
<title>Modeling and Verification of the Physical Layer of PCI Express.</title>
<pages>289-294</pages>
<year>2007</year>
<crossref>conf/cata/2007</crossref>
<booktitle>CATA</booktitle>
<url>db/conf/cata/cata2007.html#MahmoudA07</url>
</inproceedings>
</r>
<r><inproceedings key="conf/caine/El-NakhalA05" mdate="2005-12-05">
<author pid="23/1811">Ashraf El-Nakhal</author>
<author pid="20/3749">Behnam S. Arad</author>
<title>PCI-EXPRESS Transaction Layer and Application Layer of A 3-Port Switch.</title>
<pages>274-279</pages>
<year>2005</year>
<crossref>conf/caine/2005</crossref>
<booktitle>CAINE</booktitle>
<url>db/conf/caine/caine2005.html#El-NakhalA05</url>
</inproceedings>
</r>
<r><inproceedings key="conf/cata/SeoCDAP05" mdate="2021-08-09">
<author pid="70/775">Chung-Seok (Andy) Seo</author>
<author pid="31/928">Abhijit Chatterjee</author>
<author pid="19/4627">Timothy J. Drabik</author>
<author pid="20/3749">Behnam S. Arad</author>
<author pid="55/6919">Reena Patel</author>
<title>Prototyping an Embedded Bus-Based Parallel System.</title>
<pages>314-319</pages>
<year>2005</year>
<crossref>conf/cata/2005</crossref>
<booktitle>CATA</booktitle>
<url>db/conf/cata/cata2005.html#SeoCDAP05</url>
</inproceedings>
</r>
<r><inproceedings key="conf/cata/AradR05" mdate="2021-08-09">
<author pid="20/3749">Behnam S. Arad</author>
<author pid="35/4360">Sachin Rudrapatna</author>
<title>A 32-bit Residue Arithmetic Unit for High Performance Embedded Systems.</title>
<pages>320-325</pages>
<year>2005</year>
<crossref>conf/cata/2005</crossref>
<booktitle>CATA</booktitle>
<url>db/conf/cata/cata2005.html#AradR05</url>
</inproceedings>
</r>
<r><inproceedings key="conf/caine/AradS02" mdate="2006-09-26">
<author pid="20/3749">Behnam S. Arad</author>
<author pid="62/5543">Ashwin K. Sutrave</author>
<title>An Efficient Arithmetic Unit Based on Residue Number System.</title>
<pages>1-4</pages>
<year>2002</year>
<crossref>conf/caine/2002</crossref>
<booktitle>CAINE</booktitle>
<url>db/conf/caine/caine2002.html#AradS02</url>
</inproceedings>
</r>
<r><inproceedings key="conf/caine/KuoA01" mdate="2007-01-18">
<author pid="64/5234">Chia-Hung Kuo</author>
<author pid="20/3749">Behnam S. Arad</author>
<title>Design and Simulation of a Pipelined Microprocessor.</title>
<pages>5-8</pages>
<year>2001</year>
<crossref>conf/caine/2001</crossref>
<booktitle>CAINE</booktitle>
<url>db/conf/caine/caine2001.html#KuoA01</url>
</inproceedings>
</r>
<r><inproceedings key="conf/cata/AradS01" mdate="2021-08-09">
<author pid="20/3749">Behnam S. Arad</author>
<author pid="43/6608">Hung-Ru Shih</author>
<title>A pipelined processor suitable for a bus-based parallel architecture.</title>
<pages>485-488</pages>
<year>2001</year>
<crossref>conf/cata/2001</crossref>
<booktitle>CATA</booktitle>
<url>db/conf/cata/cata2001.html#AradS01</url>
</inproceedings>
</r>
<r><inproceedings key="conf/cata/AradW00" mdate="2021-08-09">
<author pid="20/3749">Behnam S. Arad</author>
<author pid="18/2454">Chien-Hsun Wang</author>
<title>Design of a processing element for bus-based parallel computing.</title>
<pages>228-231</pages>
<year>2000</year>
<crossref>conf/cata/2000</crossref>
<booktitle>CATA</booktitle>
<url>db/conf/cata/cata2000.html#AradW00</url>
</inproceedings>
</r>
<r><article key="journals/telsys/AradE98" mdate="2020-08-13">
<author pid="20/3749">Behnam S. Arad</author>
<author pid="11/3150">Ahmed El-Amawy</author>
<title>Mapping a class of neural networks on k-ary n-cubes.</title>
<pages>67-78</pages>
<year>1998</year>
<volume>10</volume>
<journal>Telecommun. Syst.</journal>
<number>1</number>
<url>db/journals/telsys/telsys10.html#AradE98</url>
<ee>https://doi.org/10.1023/A:1019154730500</ee>
</article>
</r>
<r><article key="journals/nn/AradE97" mdate="2026-04-02">
<author pid="20/3749">Behnam S. Arad</author>
<author pid="25/7849">Ahmed A. El-Amawy</author>
<title>On Fault Tolerant Training of Feedforward Neural Networks.</title>
<pages>539-553</pages>
<year>1997</year>
<volume>10</volume>
<journal>Neural Networks</journal>
<number>3</number>
<ee>https://doi.org/10.1016/S0893-6080(96)00089-5</ee>
<url>db/journals/nn/nn10.html#AradE97</url>
</article>
</r>
<coauthors n="17" nc="2">
<co c="-1"><na f="c/Chang:Hong" pid="02/2689">Hong Chang</na></co>
<co c="0"><na f="c/Chatterjee:Abhijit" pid="31/928">Abhijit Chatterjee</na></co>
<co c="0"><na f="d/Drabik:Timothy_J=" pid="19/4627">Timothy J. Drabik</na></co>
<co c="-1"><na f="e/El=Amawy:Ahmed" pid="11/3150">Ahmed El-Amawy</na></co>
<co c="-1"><na f="e/El=Amawy:Ahmed_A=" pid="25/7849">Ahmed A. El-Amawy</na></co>
<co c="-1"><na f="e/El=Nakhal:Ashraf" pid="23/1811">Ashraf El-Nakhal</na></co>
<co c="-1"><na f="h/Hakhamaneshi:Bahram" pid="35/7434">Bahram Hakhamaneshi</na></co>
<co c="-1"><na f="k/Kuo:Chia=Hung" pid="64/5234">Chia-Hung Kuo</na></co>
<co c="1"><na f="l/Le:Thomas" pid="266/0426">Thomas Le</na></co>
<co c="-1"><na f="m/Mahmoud:Mohamed" pid="64/2149">Mohamed Mahmoud</na></co>
<co c="1"><na f="m/Mitchell:William" pid="51/2927">William Mitchell</na></co>
<co c="0"><na f="p/Patel:Reena" pid="55/6919">Reena Patel</na></co>
<co c="-1"><na f="r/Rudrapatna:Sachin" pid="35/4360">Sachin Rudrapatna</na></co>
<co c="0"><na f="s/Seo:Chung=Seok_=Andy=" pid="70/775">Chung-Seok (Andy) Seo</na></co>
<co c="-1"><na f="s/Shih:Hung=Ru" pid="43/6608">Hung-Ru Shih</na></co>
<co c="-1"><na f="s/Sutrave:Ashwin_K=" pid="62/5543">Ashwin K. Sutrave</na></co>
<co c="-1"><na f="w/Wang:Chien=Hsun" pid="18/2454">Chien-Hsun Wang</na></co>
</coauthors>
</dblpperson>

