13.4 A 48GB 16-High 1280GB/s HBM3E DRAM with All-Around Power TSV and a 6-Phase RDQS Scheme for TSV Area Optimization - Jinhyung Lee; Kyungjun Cho; Chang Kwon Lee; Yeonho Lee; Jae-Hyung Park; Su-Hyun Oh; Yucheon Ju; Chunseok Jeong; Ho Sung Cho; Jaeseung Lee; Tae-Sik Yun; Jin Hee Cho; et al. (IEEE International Solid-State Circuits Conference, ISSCC 2024, San Francisco, CA, USA, February 18-22, 2024, 2024)

A Compact Resistor-Based CMOS Temperature Sensor With an Inaccuracy of 0.12 °C (3\(σ\)) and a Resolution FoM of 0.43 pJ\(·\)K\(^2\) in 65-nm CMOS - Woojun Choi; Yong-Tae Lee; Seonhong Kim; Sanghoon Lee; Jieun Jang; Junhyun Chun; Kofi A. A. Makinwa; Youngcheol Chae (IEEE J. Solid State Circuits, 2018)

A 0.53pJK\(^2\) 7000\(μ\)m\(^2\) resistor-based temperature sensor with an inaccuracy of \(±\)0.35°C (3\(σ\)) in 65nm CMOS - Woojun Choi; Yong-Tae Lee; Seonhong Kim; Sanghoon Lee; Jieun Jang; Junhyun Chun; Kofi A. A. Makinwa; Youngcheol Chae (2018 IEEE International Solid-State Circuits Conference, ISSCC 2018, San Francisco, CA, USA, February 11-15, 2018, 2018)