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Shahnam Mirzaei
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2020 – today
- 2022
- [c15]Siam Haque, Shahnam Mirzaei:
System on Chip (SoC) Security Architecture Framework for Isolated Domains Against Threats. HOST 2022: 29-32 - 2021
- [c14]Verjina Torosian Khouygani, Shahnam Mirzaei, Christian Beck, Debi Prasad Choudhary:
An FPGA Based Hardware Accelerated Framework for Solar Spectra Matching with Parameterized Matched Filter IP Core. FCCM 2021: 278 - 2020
- [c13]Kris Min, Brenda Ly, Joshua Garner, Shahnam Mirzaei:
A Novel Method for Hardware Acceleration of Convex Hull Algorithm on Reconfigurable Hardware. SoCC 2020: 78-83
2010 – 2019
- 2019
- [c12]Yin Fung Khong, Shahnam Mirzaei:
A Novel Approach for Efficient Implementation of Nucleus Detection and Segmentation Using Correlated Dual Color Space. SMC 2019: 1637-1644 - 2018
- [c11]Uzaif Sharif, Shahnam Mirzaei:
High Level Synthesis Implementation of Object Tracking Algorithm on Reconfigurable Hardware. ARC 2018: 603-614 - [c10]Peter Littlewood, Shahnam Mirzaei, Krishna Murthy Kattiyan Ramamoorthy:
Reconfigurable IP-Based Spectral Interference Canceller. ARC 2018: 627-639 - 2010
- [j2]Shahnam Mirzaei, Ryan Kastner, Anup Hosangadi:
Layout Aware Optimization of High Speed Fixed Coefficient FIR Filters for FPGAs. Int. J. Reconfigurable Comput. 2010: 697625:1-697625:17 (2010) - [j1]Ali Irturk, Bridget Benson, Shahnam Mirzaei, Ryan Kastner:
GUSTO: An automatic generation and optimization tool for matrix inversion architectures. ACM Trans. Embed. Comput. Syst. 9(4): 32:1-32:21 (2010) - [c9]Deborah Goshorn, Junguk Cho, Ryan Kastner, Shahnam Mirzaei:
Field Programmable Gate Array Implementation of Parts-Based Object Detection for Real Time Video Applications. FPL 2010: 582-587
2000 – 2009
- 2009
- [c8]Junguk Cho, Bridget Benson, Shahnam Mirzaei, Ryan Kastner:
Parallelized Architecture of Multiple Classifiers for Face Detection. ASAP 2009: 75-82 - [c7]Junguk Cho, Shahnam Mirzaei, Jason Oberg, Ryan Kastner:
Fpga-based face detection system using Haar classifiers. FPGA 2009: 103-112 - 2008
- [c6]Shahnam Mirzaei, Ali Irturk, Ryan Kastner, Brad T. Weals, Richard E. Cagley:
Design space exploration of a cooperative MIMO receiver for reconfigurable architectures. ASAP 2008: 167-172 - [c5]Ali Irturk, Bridget Benson, Shahnam Mirzaei, Ryan Kastner:
An FPGA Design Space Exploration Tool for Matrix Inversion Architectures. SASP 2008: 42-47 - 2007
- [c4]Richard E. Cagley, Brad T. Weals, Scott A. McNally, Ronald A. Iltis, Shahnam Mirzaei, Ryan Kastner:
Implementation of the Alamouti OSTBC to a Distributed Set of Single-Antenna Wireless Nodes. WCNC 2007: 577-581 - 2006
- [c3]Shahnam Mirzaei, Anup Hosangadi, Ryan Kastner:
High speed FIR filter implementation using add and shift method. FPGA 2006: 231 - [c2]Ronald A. Iltis, Shahnam Mirzaei, Ryan Kastner, Richard E. Cagley, Brad T. Weals:
Carrier Offset and Channel Estimation for Cooperative MIMO Sensor Networks. GLOBECOM 2006 - [c1]Shahnam Mirzaei, Anup Hosangadi, Ryan Kastner:
FPGA Implementation of High Speed FIR Filters Using Add and Shift Method. ICCD 2006: 308-313
Coauthor Index
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