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Sunghye Park
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2020 – today
- 2024
- [c8]Sunghye Park
, Dohun Kim
, Seokhyeong Kang
:
HiLight: A Comprehensive Framework for High-Performance and Lightweight Scalability in Surface Code Communication. DAC 2024: 15:1-15:6 - [c7]Ludwig Schmid
, Sunghye Park
, Robert Wille
:
Hybrid Circuit Mapping: Leveraging the Full Spectrum of Computational Capabilities of Neutral Atom Quantum Computers. DAC 2024: 267:1-267:6 - [c6]Seongbin Kwon, Dohun Kim
, Sunghye Park
, Seojeong Kim, Seokhyeong Kang:
QNSA: Quantum Neural Simulated Annealing for Combinatorial Optimization. ISQED 2024: 1-7 - 2023
- [c5]Kyungjun Min, Seongbin Kwon, Sung-Yun Lee, Dohun Kim, Sunghye Park
, Seokhyeong Kang:
ClusterNet: Routing Congestion Prediction and Optimization Using Netlist Clustering and Graph Neural Networks. ICCAD 2023: 1-9 - [i1]Ludwig Schmid
, Sunghye Park
, Seokhyeong Kang, Robert Wille:
Hybrid Circuit Mapping: Leveraging the Full Spectrum of Computational Capabilities of Neutral Atom Quantum Computers. CoRR abs/2311.14164 (2023) - 2022
- [c4]Sunghye Park
, Daeyeon Kim, Minhyuk Kweon, Jae-Yoon Sim, Seokhyeong Kang:
A fast and scalable qubit-mapping method for noisy intermediate-scale quantum computers. DAC 2022: 13-18 - [c3]Sunghye Park
, Dohun Kim, Jae-Yoon Sim, Seokhyeong Kang:
MCQA: Multi-Constraint Qubit Allocation for Near-FTQC Device. ICCAD 2022: 108:1-108:9 - 2020
- [j1]Sunmean Kim
, Sung-Yun Lee
, Sunghye Park
, Kyung Rok Kim
, Seokhyeong Kang
:
A Logic Synthesis Methodology for Low-Power Ternary Logic Circuits. IEEE Trans. Circuits Syst. I Regul. Pap. 67-I(9): 3138-3151 (2020)
2010 – 2019
- 2019
- [c2]Sunmean Kim
, Sung-Yun Lee
, Sunghye Park
, Seokhyeong Kang:
Design of Quad-Edge-Triggered Sequential Logic Circuits for Ternary Logic. ISMVL 2019: 37-42 - [c1]Sunghye Park
, Sunmean Kim
, Seokhyeong Kang:
Multi-Threshold Voltages Graphene Barristor-Based Ternary ALU. ISOCC 2019: 25-26
Coauthor Index
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