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Patrícia Ücker
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2020 – today
- 2024
- [j6]Morgana Macedo Azevedo da Rosa
, Patrícia Ücker Leleu da Costa
VLSI Architectures of Approximate Arithmetic Units Applied to Parallel Sensors Calibration. IEEE Trans. Circuits Syst. I Regul. Pap. 71(3): 1000-1013 (2024) - 2023
- [j5]Morgana Macedo Azevedo da Rosa
AxPPA: Approximate Parallel Prefix Adders. IEEE Trans. Very Large Scale Integr. Syst. 31(1): 17-28 (2023) - [c11]Patrícia U. L. da Costa, Morgana M. A. da Rosa, Rafael Soares, Eduardo A. C. da Costa, Sergio Bampi:
An Optimized VLSI Exponential Unit Design Exploring Efficient Arithmetic Operation Strategies. ICECS 2023: 1-4 - [c10]Morgana M. A. da Rosa
An Energy-Efficient StEFCal VLSI Design with Approximate Squarer and Divider Units. LASCAS 2023: 1-4 - 2022
- [j4]Pedro Tauã Lopes Pereira
Energy-Quality Scalable Design Space Exploration of Approximate FFT Hardware Architectures. IEEE Trans. Circuits Syst. I Regul. Pap. 69(11): 4524-4534 (2022) - [c9]Patrícia U. L. da Costa, Morgana M. A. da Rosa, Guilherme Paim, Eduardo Antonio Cesar da Costa, Rafael Soares, Sergio Bampi:
An Efficient Exponential Unit Designed in VLSI CMOS with Custom Operators. ICECS 2022 2022: 1-4 - [c8]Patrícia U. L. da Costa, Pedro Tauã Lopes Pereira, Brunno A. Abreu, Guilherme Paim, Eduardo A. C. da Costa, Sergio Bampi:
Improved Approximate Multipliers for Single-Precision Floating-Point Hardware Design. LASCAS 2022: 1-4 - 2021
- [j3]Andrei La Rosa
Exploring NLMS-Based Adaptive Filter Hardware Architectures for Eliminating Power Line Interference in EEG Signals. Circuits Syst. Signal Process. 40(7): 3305-3337 (2021) - [j2]Patrícia Ücker Leleu da Costa
Fixed-Point NLMS and IPNLMS VLSI Architectures for Accurate FECG and FHR Processing. IEEE Trans. Biomed. Circuits Syst. 15(5): 898-911 (2021) - [j1]Pedro Tauã Lopes Pereira
Architectural Exploration for Energy-Efficient Fixed-Point Kalman Filter VLSI Design. IEEE Trans. Very Large Scale Integr. Syst. 29(7): 1402-1415 (2021) - [c7]Patrícia U. L. da Costa
Boosting the Efficiency of the Harmonics Elimination VLSI Architecture by Arithmetic Approximations. ICECS 2021: 1-4 - 2020
- [c6]Patrícia U. L. da Costa
An Efficient NLMS-based VLSI Architecture for Robust FECG Extraction and FHR Processing. ICECS 2020: 1-4 - [c5]Andrei La Rosa
Exploring NLMS and IPNLMS Adaptive Filtering VLSI Hardware Architectures for Robust EEG Signal Artifacts Elimination. ICECS 2020: 1-4 - [c4]Thomas V. Fontanari, Guilherme Paim
An Efficient N-bit 8-2 Adder Compressor with a Constant Internal Carry Propagation Delay. LASCAS 2020: 1-4 - [c3]Patrícia Ücker
Optimizing Iterative-based Dividers for an Efficient Natural Logarithm Operator Design. LASCAS 2020: 1-4 - [c2]Mateus Terribele Leme, Guilherme Paim
Optimizing the Montgomery Modular Multiplier for a Power- and Area-Efficient Hardware Architecture. MWSCAS 2020: 1084-1087
2010 – 2019
- 2019
- [c1]Pedro Tauã Lopes Pereira
Exploring Architectural Solutions for an Energy-Efficient Kalman Filter Gain Realization. ICECS 2019: 650-653
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