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Yongping Fan
Person information
- affiliation: Intel Corporation, Hillsboro, OR, USA
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2020 – today
- 2022
- [j5]Jihwan Kim, Sandipan Kundu, Ajay Balankutty, Matthew Beach, Bong Chan Kim, Stephen T. Kim, Yutao Liu, Savyasaachi Keshava Murthy, Priya Wali, Kai Yu, Hyung Seok Kim, Chuanchang Liu, Dongseok Shin, Ariel Cohen, Yoav Segal, Yongping Fan, Peng Li, Frank O'Mahony:
A 224-Gb/s DAC-Based PAM-4 Quarter-Rate Transmitter With 8-Tap FFE in 10-nm FinFET. IEEE J. Solid State Circuits 57(1): 6-20 (2022) - [j4]Dongseok Shin, Hyung Seok Kim, Chuanchang Liu, Priya Wali, Savyasaachi Keshava Murthy, Yongping Fan:
A Fractional-N Digital LC-PLL Using Coupled Frequency Doubler With Frequency-Tracking Loop for Wireline Applications. IEEE J. Solid State Circuits 57(6): 1736-1748 (2022) - [c7]You Li, David E. Duarte, Yongping Fan:
A 90.9kS/s, 0.7nJ/conversion Hybrid Temperature Sensor in 4nm-class CMOS. VLSI Technology and Circuits 2022: 118-119 - 2021
- [j3]Shravan S. Nagam, Yongping Fan, Peter R. Kinget:
Auxiliary Feed-Forward Noise Cancellation Techniques for a Generic Type-II Ring Oscillator Phase Locked Loop. IEEE Trans. Circuits Syst. II Express Briefs 68(5): 1670-1674 (2021) - [c6]Jihwan Kim, Sandipan Kundu, Ajay Balankutty, Matthew Beach, Bong Chan Kim, Stephen Kim, Yutao Liu, Savyassachi Keshava Murthy, Priya Wali, Kai Yu, Hyung Seok Kim, Chuanchang Liu, Dongseok Shin, Ariel Cohen, Yongping Fan, Frank O'Mahony:
8.1 A 224Gb/s DAC-Based PAM-4 Transmitter with 8-Tap FFE in 10nm CMOS. ISSCC 2021: 126-128 - [c5]Dongseok Shin, Hyung Seok Kim, Chuanchang Liu, Priya Wali, Savyasaachi Keshava Murthy, Yongping Fan:
11.5 A 23.9-to-29.4GHz Digital LC-PLL with a Coupled Frequency Doubler for Wireline Applications in 10nm FinFET. ISSCC 2021: 188-190 - 2020
- [c4]Bo Xiang, Yongping Fan, James S. Ayers, James Shen, Dan Zhang:
A 0.5V-to-0.9V 0.2GHz-to-5GHz Ultra-Low-Power Digitally-Assisted Analog Ring PLL with Less Than 200ns Lock Time in 22nm FinFET CMOS Technology. CICC 2020: 1-4
2010 – 2019
- 2019
- [c3]Yongping Fan, Bo Xiang, Dan Zhang, James S. Ayers, Kuan-Yueh James Shen, Andrey Mezhiba:
Digital Leakage Compensation for a Low-Power and Low-Jitter 0.5-to-5GHz PLL in 10nm FinFET CMOS Technology. ISSCC 2019: 320-322 - 2018
- [j2]Kuan-Yueh James Shen, Syed Feruz Syed Farooq, Yongping Fan, Khoa Minh Nguyen, Qi Wang, Mark Neidengard, Nasser A. Kurd, Amr Elshazly:
A Flexible, Low-Power Analog PLL for SoC and Processors in 14nm CMOS. IEEE Trans. Circuits Syst. I Regul. Pap. 65-I(7): 2109-2117 (2018) - 2016
- [c2]Kuan-Yueh James Shen, Syed Feruz Syed Farooq, Yongping Fan, Khoa Minh Nguyen, Qi Wang, Amr Elshazly, Nasser A. Kurd:
19.4 A 0.17-to-3.5mW 0.15-to-5GHz SoC PLL with 15dB built-in supply noise rejection and self-bandwidth control in 14nm CMOS. ISSCC 2016: 330-331 - 2010
- [c1]Fulvio Spagna, Lidong Chen, Mamatha Deshpande, Yongping Fan, Doug Gambetta, Sujatha Gowder, Sitaraman Iyer, Rohit Kumar, Peter Kwok, Renuka Krishnamurthy, Chien-chun Lin, Ravindran Mohanavelu, Roan Nicholson, Jeff Ou, Marcus Pasquarella, Kavitha Prasad, Hendra Rustam, Luke Tong, Amanda Tran, John Wu, Xuguang Zhang:
A 78mW 11.8Gb/s serial link transceiver with adaptive RX equalization and baud-rate CDR in 32nm CMOS. ISSCC 2010: 366-367
2000 – 2009
- 2003
- [j1]Yongping Fan, Jeffrey E. Smith:
On-die termination resistors with analog impedance control for standard CMOS technology. IEEE J. Solid State Circuits 38(2): 361-364 (2003)
Coauthor Index
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