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Michael Romain
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2020 – today
- 2025
- [c4]Gerald Strevig, Christopher J. Berry, Rahul M. Rao, Noam Jungmann, Michael A. Sperling, Michael J. Becht, Eduard Herkel, Matthias Pflanz, Patrick J. Meaney, Michael Romain, Mark Cichanowski, Amanda Venton, David Wolpert, Elazar Kachir, Luke Hopkins, Tim E. Bubb, Andreas Arp, Daniel Kiss, Simon Büchsenstein, Michael H. Wood, Michael Spear, Robert J. Sonnelitter, Rajiv Joshi:
2.2 IBM Telum II: Next Generation 5.5GHz Microprocessor with On-Die Data Processing Unit and Improved AI Accelerator. ISSCC 2025: 1-3 - [c3]Tobias Webel, Phillip J. Restle, Ramon Bertran, Alper Buyuktosunoglu, Sean M. Carey, Alejandro Cook, Karl Anderson, Michael Romain, Thomas Strach, Pradeep Bhadravati Parashurama, Aishwarya Tadkase, Rahman Abber Tahir, Luke Jenkins, Kevin Low, Eberhard Engler:
8.1 Dynamic Guard-Band Features of the IBM zNext System. ISSCC 2025: 1-3 - [c2]David Wolpert, Gerry Strevig, Christopher J. Berry, Leon J. Sigal, Bill Huott, Mark Cichanowski, Matthias Pflanz, Tobias Werner, Philipp Salz, Nick Jinq, Michael Romain, Iris Leefken, Richard E. Serton, Rajesh Veerabhadraiah, Dureseti Chidambarrao, Robert Arelt, Matt Angyal, Ben Trombley, Arvind Haran, Stefan Hougardy, Ben Klotz, Rahul M. Rao:
37.1 IBM Telum II Processor Design-Technology Co-Optimizations for Power, Performance, Area, and Reliability. ISSCC 2025: 606-608 - 2022
- [c1]Ofer Geva, Christopher J. Berry, Robert J. Sonnelitter, David Wolpert, Adam Collura, Thomas Strach, Di Phan, Cédric Lichtenau, Alper Buyuktosunoglu, Hubert Harrer, Jeffrey A. Zitz, Chad Marquart, Douglas Malone, Tobias Webel, Adam Jatkowski, John Isakson, Dina Hamid, Mark Cichanowski, Michael Romain, Faisal Hasan, Kevin Williams, Jesse Surprise, Chris Cavitt, Mark Cohen:
IBM Telum: a 16-Core 5+ GHz DCM. ISSCC 2022: 46-48 - 2021
- [j1]David Wolpert
, Christopher J. Berry
Cores, Cache, Content, and Characterization: IBM's Second Generation 14-nm Product, z15. IEEE J. Solid State Circuits 56(1): 98-111 (2021)
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