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Herman E. Maes
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2000 – 2009
- 2007
- [j9]A. Shickova, Ben Kaczer, Anabela Veloso, Marc Aoulaiche, M. Houssa, Herman E. Maes, Guido Groeseneken
, J. A. Kittl:
NBTI reliability of Ni FUSI/HfSiON gates: Effect of silicide phase. Microelectron. Reliab. 47(4-5): 505-507 (2007) - 2005
- [j8]Vesselin K. Vassilev, Steven Thijs, P. L. Segura, Piet Wambacq, Paul Leroux
ESD-RF co-design methodology for the state of the art RF-CMOS blocks. Microelectron. Reliab. 45(2): 255-268 (2005) - 2004
- [j7]Vesselin K. Vassilev, Vladislav A. Vashchenko, Philippe Jansen, B.-J. Choi, Ann Concannon, J.-J. Yang, Guido Groeseneken
A CAD assisted design and optimisation methodology for over-voltage ESD protection circuits. Microelectron. Reliab. 44(9-11): 1885-1890 (2004) - 2003
- [j6]Vesselin K. Vassilev, Snezana Jenei, Guido Groeseneken
High frequency characterization and modelling of the parasitic RC performance of two terminal ESD CMOS protection devices. Microelectron. Reliab. 43(7): 1011-1020 (2003) - 2002
- [j5]Jeroen A. Croon, Maarten Rosmeulen, Stefaan Decoutere, Willy Sansen, Herman E. Maes:
An easy-to-use mismatch model for the MOS transistor. IEEE J. Solid State Circuits 37(8): 1056-1064 (2002) - 2001
- [j4]M. Lorenzini, Luc Haspeslagh, Jan Van Houdt, Herman E. Maes:
Simulation of 0.35 μm/0.25 μm CMOS Technology Doping Profiles. VLSI Design 13(1-4): 459-463 (2001)
1990 – 1999
- 1998
- [j3]Donato Montanari, Jan Van Houdt, Guido Groeseneken
Novel level-identifying circuit for flash multilevel memories. IEEE J. Solid State Circuits 33(7): 1090-1095 (1998) - [j2]Bruno Riccò, Guido Torelli, Massimo Lanzoni, Alessandro Manstretta, Herman E. Maes, Donato Montanari, Alberto Modelli
Nonvolatile multilevel memories for digital applications. Proc. IEEE 86(12): 2399-2423 (1998)
1980 – 1989
- 1989
- [j1]Johan S. Witters, Guido Groeseneken
Analysis and modeling of on-chip high-voltage generator circuits for use in EEPROM circuits. IEEE J. Solid State Circuits 24(5): 1372-1380 (1989)
Coauthor Index
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