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Rushik Parmar
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2020 – today
- 2024
- [j5]Rushik Parmar
, Khushil Yadav, Gauraangi Anand, Gaurav Trivedi
An SNN-Inspired Area- and Power-Efficient VLSI Architecture of Myocardial Infarction Classifier for Wearable Devices. IEEE Trans. Circuits Syst. II Express Briefs 71(6): 3191-3195 (2024) - [j4]Meenali Janveja
A Low-Power Co-Processor to Predict Ventricular Arrhythmia for Wearable Healthcare Devices. IEEE Trans. Very Large Scale Integr. Syst. 32(9): 1672-1683 (2024) - [c4]Bipul Boro, Rushik Parmar, Ashvinikumar Dongre, Gaurav Trivedi:
Reprogrammable Time-Domain RRAM Based Vector Matrix Multiplier for In-Memory Computing. ISQED 2024: 1-8 - 2023
- [j3]Meenali Janveja
MInSC: A VLSI Architecture for Myocardial Infarction Stages Classifier for Wearable Healthcare Applications. IEEE Trans. Circuits Syst. II Express Briefs 70(3): 1159-1163 (2023) - [j2]Rushik Parmar
Design of DNN-Based Low-Power VLSI Architecture to Classify Atrial Fibrillation for Wearable Devices. IEEE Trans. Very Large Scale Integr. Syst. 31(3): 320-330 (2023) - [c3]Bipul Boro, Ashvinikumar Dongre, Rushik Parmar, Gaurav Trivedi:
Programmable Binary Weighted Time-Domain Vector Matrix Multiplier for In-Memory Computing. APCCAS 2023: 261-265 - 2022
- [j1]Meenali Janveja
A DNN-Based Low Power ECG Co-Processor Architecture to Classify Cardiac Arrhythmia for Wearable Devices. IEEE Trans. Circuits Syst. II Express Briefs 69(4): 2281-2285 (2022) - [c2]Meenali Janveja, Rushik Parmar
An Energy Efficient and Resource Optimal VLSI Architecture for ECG Feature Extraction for Wearable Healthcare Applications. RADIOELEKTRONIKA 2022: 1-6 - [c1]Rushik Parmar
An Area and Power Efficient VLSI Architecture to Detect Obstructive Sleep Apnea for Wearable Devices. RADIOELEKTRONIKA 2022: 1-5
Coauthor Index
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