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Chung-Wen Huang
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2020 – today
- 2021
- [c9]Hui-Hsin Liao, Chao-Lin Lee, Jenq-Kuen Lee, Wei-Chih Lai, Ming-Yu Hung, Chung-Wen Huang:
Support Convolution of CNN with Compression Sparse Matrix Multiplication Flow in TVM. ICPP Workshops 2021: 17:1-17:7
2010 – 2019
- 2019
- [c8]Chao-Lin Lee, Chen-Ting Chao, Jenq-Kuen Lee, Ming-Yu Hung, Chung-Wen Huang:
Accelerate DNN Performance with Sparse Matrix Compression in Halide. ICPP Workshops 2019: 14:1-14:6 - [c7]Chao-Lin Lee, Chen-Ting Chao, Jenq-Kuen Lee, Chung-Wen Huang, Ming-Yu Hung:
Sparse-Matrix Compression Primitives with OpenCL Framework to Support Halide. IWOCL 2019: 24:1-24:2 - 2015
- [j5]Cheng-Yen Lin, Chung-Wen Huang, Chi-Bang Kuan, Shi-Yu Huang, Jenq Kuen Lee:
The Design and Experiments of A SID-Based Power-Aware Simulator for Embedded Multicore Systems. ACM Trans. Design Autom. Electr. Syst. 20(2): 22:1-22:27 (2015) - 2014
- [j4]Wen-Li Shih, Yi-Ping You
, Chung-Wen Huang, Jenq Kuen Lee:
Compiler Optimization for Reducing Leakage Power in Multithread BSP Programs. ACM Trans. Design Autom. Electr. Syst. 20(1): 9:1-9:34 (2014) - 2010
- [j3]Chung-Wen Huang, Wen-Li Shih, Chung-Ju Wu, Jia-Jhe Li, Jenq Kuen Lee:
Programming model and tools for embedded multicore systems. Int. J. Embed. Syst. 4(3/4): 259-269 (2010) - [c6]Cheng-Yen Lin, Po-Yu Chen, Chun-Kai Tseng, Chung-Wen Huang, Chia-Chieh Weng, Chi-Bang Kuan, Shih-Han Lin, Shi-Yu Huang, Jenq Kuen Lee:
Power aware SID-based simulator for embedded multicore DSP subsystems. CODES+ISSS 2010: 95-104
2000 – 2009
- 2009
- [c5]Chung-Wen Huang, Kun-Yuan Hsieh, Jia-Jhe Li, Jenq Kuen Lee:
Support of Paged Register Files for Improving Context Switching on Embedded Processors. CSE (2) 2009: 352-357 - [c4]Chung-Wen Huang, Wei-Kuan Shih, Yarsun Hsu, Jenq Kuen Lee:
Configurable SID-based multi-core simulators for embedded system education. WESE@ESWEEK 2009: 64-70 - 2007
- [j2]Yung-Chia Lin, Yi-Ping You
Energy-aware scheduling and simulation methodologies for parallel security processors with multiple voltage domains. J. Supercomput. 42(2): 201-223 (2007) - [j1]Yi-Ping You
Compilation for compact power-gating controls. ACM Trans. Design Autom. Electr. Syst. 12(4): 51 (2007) - 2005
- [c3]Yung-Chia Lin, Chung-Wen Huang, Jenq Kuen Lee:
System-level design space exploration for security processor prototyping in analytical approaches. ASP-DAC 2005: 376-380 - [c2]Yi-Ping You
A sink-n-hoist framework for leakage power reduction. EMSOFT 2005: 124-133 - 2004
- [c1]Yung-Chia Lin, Yi-Ping You
Power-Aware Scheduling for Parallel Security Processors with Analytical Models. LCPC 2004: 470-484
Coauthor Index
aka: Jenq-Kuen Lee
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