default search action
João Navarro 0001
Person information
- affiliation: University of São Paulo, São Carlos, Brazil
Refine list
refinements active!
zoomed in on ?? of ?? records
view refined list in
export refined list as
2020 – today
- 2025
- [c25]Helder Eiki Oshiro, Rodrigo de A. P. Andrade, João Navarro Soares Junior, Maximiliam Luppe, Eduardo Colombari, M. Celeste Dias, João Paulo Carmo:
Development of Optrodes and Instrumentation for Wireless Optogenetic Application. BIOSTEC (1) 2025: 1073-1079 - [c24]Helder Eiki Oshiro, Rodrigo de A. P. Andrade, João Navarro Soares Junior, Maximiliam Luppe, Eduardo Colombari, M. Celeste Dias, João Paulo Carmo:
A Low-Noise Amplifier in Submicron CMOS for Neural Recording on Optogenetics Applications. BIOSTEC (1) 2025: 1080-1084 - 2024
- [c23]Lucas Daudt Franck, João Navarro, João Paulo Carmo:
A Divide-by-1.5/2 Prescaler Utilizing Double Data Rate Technique. SBCCI 2024: 1-5 - 2021
- [c22]Tiago Mateus Nordi
, V. M. Barbosa, R. H. Gounella, Godfred Asan, Maximiliam Luppe
Charge-Pump Circuit in 65nm CMOS for Neural Stimulation on Deep-Brain Stimulation. DCIS 2021: 1-4 - 2020
- [c21]João Navarro
Performance Comparison of High-Speed Dual Modulus Prescalers Using Metaheuristic Sizing/Optimization. SBCCI 2020: 1-6
2010 – 2019
- 2019
- [c20]Arthur Lombardi Campos
Design of a low power 10-bit 12MS/s asynchronous SAR ADC in 65nm CMOS. SBCCI 2019: 31 - 2014
- [c19]Gabriel R. Guerreiro, João Navarro
Design for Stability of Active Inductor with Feedback Resistance. SBCCI 2014: 3:1-3:6 - 2013
- [c18]Dionisio de Carvalho
A power optimized decimator for sigma-delta data converters. LASCAS 2013: 1-4 - [c17]Heiner Alarcon Cubas, João Navarro Soares Jr.:
Design of an OTA-Miller for a 96dB SNR SC multi-bit Sigma-Delta modulator based on gm/ID methodology. LASCAS 2013: 1-4 - [c16]Eder Issao Ishibe, João Navarro Soares Junior:
A bandgap circuit with a temperature coefficient adjustment block. MWSCAS 2013: 101-104 - [c15]Eder Issao Ishibe, João Navarro Soares:
A CMOS bandgap reference circuit with a temperature coefficient adjustment block. SBCCI 2013: 1-6 - 2012
- [c14]Heiner Alarcon Cubas, João Navarro Soares Jr.:
Top-down design for Low power Multi-bit Sigma-Delta Modulator. SBCCI 2012: 1-6 - 2011
- [c13]João Navarro Soares
A simple CMOS bandgap reference circuit with sub-1-V operation. ISCAS 2011: 2289-2292 - [c12]João Navarro Jr.
Design of high speed digital circuits with E-TSPC cell library. SBCCI 2011: 167-172
2000 – 2009
- 2007
- [c11]Fernando P. H. de Miranda, João Navarro Jr.
A 4.1 GHz Dual Modulus Prescaler Using the E-TSPC Technique and Double Data Throughput Structures. ISCAS 2007: 1895-1898 - [c10]Hugo Daniel Hernández
A small area 8bits 50MHz CMOS DAC for bluetooth transmitter. SBCCI 2007: 10-15 - [c9]Fernando P. H. de Miranda, João Navarro Jr.
A 4.1 GHz prescaler using double data throughput E-TSPC structures. SBCCI 2007: 123-127 - 2006
- [c8]Alexandre J. Aragão
Mismatch effect analyses in CMOS tapered buffers. ISCAS 2006 - 2005
- [c7]Angel M. Gómez Argüello, João Navarro Jr., Wilhelmus A. M. Van Noije:
A 3.5 mW programmable high speed frequency divider for a 2.4 GHz CMOS frequency synthesizer. SBCCI 2005: 144-148 - 2004
- [c6]Fernando P. H. de Miranda, João Navarro Jr., Wilhelmus A. M. Van Noije:
A 4 GHz dual modulus divider-by 32/33 prescaler in 0.35m CMOS technology. SBCCI 2004: 94-99 - 2003
- [c5]Elkim Roa, João Navarro Soares, Wilhelmus A. M. Van Noije:
A Methodology for CMOS Low Noise Ampli.er Design. SBCCI 2003: 14-19 - 2002
- [j3]João Navarro Jr.
Extended TSPC structures with double input/output data throughput for gigahertz CMOS circuit design. IEEE Trans. Very Large Scale Integr. Syst. 10(3): 301-308 (2002) - 2000
- [c4]João Navarro Soares, Wilhelmus A. M. Van Noije:
The Use of Extended TSPC CMOS Structures to Build Circuits with Doubled Input/Output Data Throughput. SBCCI 2000: 228-236
1990 – 1999
- 1999
- [j2]João Navarro Soares, Wilhelmus A. M. Van Noije:
A 1.6-GHz dual modulus prescaler using the extended true-single-phase-clock CMOS circuit technique (E-TSPC). IEEE J. Solid State Circuits 34(1): 97-102 (1999) - 1998
- [c3]João Navarro Jr., Wilhelmus A. M. Van Noije:
CMOS Tapered Buffer Design for Small Width Clock/Data Signal Propagation. Great Lakes Symposium on VLSI 1998: 89-94 - [c2]João Navarro Jr., Wilhelmus A. M. Van Noije:
Design of an 8: 1 MUX at 1.7Gbit/s in 0.8µm CMOS Technology. Great Lakes Symposium on VLSI 1998: 103-107 - 1997
- [c1]João Navarro Jr., Reinaldo Silveira, Fábio L. Romao, Wilhelmus A. M. Van Noije:
A 1.4 Gbit/s CMOS driver for 50 Ω ECL systems. Great Lakes Symposium on VLSI 1997: 14- - 1995
- [j1]Wilhelmus A. M. Van Noije, W. T. Liu, João Navarro Jr.
Precise final state determination of mismatched CMOS latches. IEEE J. Solid State Circuits 30(5): 607-611 (1995)
Coauthor Index
manage site settings
To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.
Unpaywalled article links
Add open access links from to the list of external document links (if available).
Privacy notice: By enabling the option above, your browser will contact the API of unpaywall.org to load hyperlinks to open access articles. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the Unpaywall privacy policy.
Archived links via Wayback Machine
For web page which are no longer available, try to retrieve content from the of the Internet Archive (if available).
Privacy notice: By enabling the option above, your browser will contact the API of archive.org to check for archived content of web pages that are no longer available. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the Internet Archive privacy policy.
Reference lists
Add a list of references from ,
, and
to record detail pages.
load references from crossref.org and opencitations.net
Privacy notice: By enabling the option above, your browser will contact the APIs of crossref.org, opencitations.net, and semanticscholar.org to load article reference information. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the Crossref privacy policy and the OpenCitations privacy policy, as well as the AI2 Privacy Policy covering Semantic Scholar.
Citation data
Add a list of citing articles from and
to record detail pages.
load citations from opencitations.net
Privacy notice: By enabling the option above, your browser will contact the API of opencitations.net and semanticscholar.org to load citation information. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the OpenCitations privacy policy as well as the AI2 Privacy Policy covering Semantic Scholar.
OpenAlex data
Load additional information about publications from .
Privacy notice: By enabling the option above, your browser will contact the API of openalex.org to load additional information. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the information given by OpenAlex.
last updated on 2025-04-11 18:29 CEST by the dblp team
all metadata released as open data under CC0 1.0 license
see also: Terms of Use | Privacy Policy | Imprint
dblp was originally created in 1993 at:
since 2018, dblp has been operated and maintained by:
the dblp computer science bibliography is funded and supported by: