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Hideaki Yamamoto
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2020 – today
- 2024
- [c7]Satoshi Moriya, Hideaki Yamamoto, Masaya Ishikawa, Yasushi Yuminaka, Yoshihiko Horio, Jordi Madrenas, Shigeo Sato:
Design of Mixed-Signal LSI with Analog Spiking Neural Network and Digital Inference Circuits for Reservoir Computing. IJCNN 2024: 1-6 - 2022
- [c6]Satoshi Moriya, Hideaki Yamamoto, Shigeo Sato, Yasushi Yuminaka, Yoshihiko Horio, Jordi Madrenas:
A Fully Analog CMOS Implementation of a Two-variable Spiking Neuron in the Subthreshold Region and its Network Operation. IJCNN 2022: 1-7 - 2021
- [j6]Yifan Dai, Hideaki Yamamoto, Masao Sakuraba, Shigeo Sato:
Computational Efficiency of a Modular Reservoir Network for Image Recognition. Frontiers Comput. Neurosci. 15: 594337 (2021) - [c5]Shigeo Sato, Satoshi Moriya, Yuka Kanke, Hideaki Yamamoto, Yoshihiko Horio, Yasushi Yuminaka, Jordi Madrenas:
A Subthreshold Spiking Neuron Circuit Based on the Izhikevich Model. ICANN (5) 2021: 177-181 - 2020
- [j5]Kouhei Hattori, Takeshi Hayakawa, Akira Nakanishi, Mihoko Ishida, Hideaki Yamamoto, Ayumi Hirano-Iwata, Takashi Tanii:
Contribution of AMPA and NMDA receptors in the spontaneous firing patterns of single neurons in autaptic culture. Biosyst. 198: 104278 (2020)
2010 – 2019
- 2019
- [c4]Satoshi Moriya, Hideaki Yamamoto, Ayumi Hirano-Iwata, Shigeru Kubota, Shigeo Sato:
Quantitative Analysis of Dynamical Complexity in Cultured Neuronal Network Models for Reservoir Computing Applications. IJCNN 2019: 1-6 - 2018
- [j4]Hideaki Yamamoto, Shigeru Kubota, Fabio A. Shimizu, Ayumi Hirano-Iwata, Michio Niwano:
Effective Subnetwork Topology for Synchronizing Interconnected Networks of Coupled Phase Oscillators. Frontiers Comput. Neurosci. 12: 17 (2018) - 2017
- [c3]Satoshi Moriya, Hideaki Yamamoto, Hisanao Akima, Ayumi Hirano-Iwata, Michio Niwano, Shigeru Kubota, Shigeo Sato:
Modularity-dependent modulation of synchronized bursting activity in cultured neuronal network models. IJCNN 2017: 1163-1168 - [i1]Ramin M. Hasani, Giorgio Ferrari, Hideaki Yamamoto, Sho Kono, Koji Ishihara, Soya Fujimori, Takashi Tanii, Enrico Prati:
Control of the Correlation of Spontaneous Neuron Activity in Biological and Noise-activated CMOS Artificial Neural Microcircuits. CoRR abs/1702.07426 (2017) - 2011
- [j3]Yu Kikuchi, Makoto Takahashi, Tomohisa Maeda, Masatoshi Fukuda, Yasuhiro Koshio, Hiroyuki Hara, Hideho Arakida, Hideaki Yamamoto, Yousuke Hagiwara, Tetsuya Fujita, Manabu Watanabe, Hirokazu Ezawa, Takayoshi Shimazawa, Yasuo Ohara, Takashi Miyamori, Mototsugu Hamada, Masafumi Takahashi, Yukihito Oowaki:
A 40 nm 222 mW H.264 Full-HD Decoding, 25 Power Domains, 14-Core Application Processor With x512b Stacked DRAM. IEEE J. Solid State Circuits 46(1): 32-41 (2011) - 2010
- [c2]Yu Kikuchi, Makoto Takahashi, Tomohisa Maeda, Hiroyuki Hara, Hideho Arakida, Hideaki Yamamoto, Yousuke Hagiwara, Tetsuya Fujita, Manabu Watanabe, Takayoshi Shimazawa, Yasuo Ohara, Takashi Miyamori, Mototsugu Hamada, Yukihito Oowaki:
A 222mW H.264 Full-HD decoding application processor with x512b stacked DRAM in 40nm. ISSCC 2010: 326-327
2000 – 2009
- 2009
- [j2]Hideaki Yamamoto, Minoru Ikeda, Yasuhiro Hosoda:
Ultra-Small Reader/Writer with Multiple Contactless Interfaces on a Flexible Circuit Board. IEICE Trans. Commun. 92-B(9): 2992-2995 (2009) - 2000
- [j1]Masafumi Takahashi, Tsuyoshi Nishikawa, Mototsugu Hamada, Toshinari Takayanagi, Hideho Arakida, Noriaki Machida, Hideaki Yamamoto, Toshihide Fujiyoshi, Yoko Ohashi, Osamu Yamagishi, Tatsuo Samata, Atsushi Asano, Toshihiro Terazawa, Kenji Ohmori, Yoshinori Watanabe, Hiroki Nakamura, Shigenobu Minami, Tadahiro Kuroda, Tohru Furuyama:
A 60-MHz 240-mW MPEG-4 videophone LSI with 16-Mb embedded DRAM. IEEE J. Solid State Circuits 35(11): 1713-1721 (2000) - [c1]Masafumi Takahashi, Tsuyoshi Nishikawa, Hideho Arakida, Noriaki Machida, Hideaki Yamamoto, Toshihide Fujiyoshi, Yoko Matsumoto, Osamu Yamagishi, Tatsuo Samata, Atsushi Asano, Toshihiro Terazawa, Kenji Ohmori, Junya Shirakura, Yoshinori Watanabe, Hiroki Nakamura, Shigenobu Minami, Tohru Furuyama:
A scalable MPEG-4 video codec architecture for IMT-2000 multimedia applications. ISCAS 2000: 188-191
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last updated on 2024-09-21 01:48 CEST by the dblp team
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