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Jingyu Wang 0004
Person information
- unicode name: 王靖宇
- affiliation: Tsinghua University, Department of Electronic Engineering, Beijing, China
Other persons with the same name
- Jingyu Wang (aka: Jing-Yu Wang) — disambiguation page
- Jingyu Wang 0001
(aka: Jing-Yu Wang 0001) — Beijing University of Posts and Telecommunications, State Key Laboratory of Networking and Switching Technology, Beijing, China
- Jingyu Wang 0002
- Jingyu Wang 0003
- Jingyu Wang 0005
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2020 – today
- 2024
- [j11]Jinshan Yue
An Energy-Efficient Computing-in-Memory NN Processor With Set-Associate Blockwise Sparsity and Ping-Pong Weight Update. IEEE J. Solid State Circuits 59(5): 1612-1627 (2024) - [j10]Jingyu Wang
ULSeq-TA: Ultra-Long Sequence Attention Fusion Transformer Accelerator Supporting Grouped Sparse Softmax and Dual-Path Sparse LayerNorm. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 43(3): 892-905 (2024) - [j9]Lu Zhang
RE-Specter: Examining the Architectural Features of Configurable CNN With Power Side-Channel. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 43(10): 2916-2929 (2024) - 2023
- [j8]Yifan He, Jinshan Yue, Xiaoyu Feng
An RRAM-Based Digital Computing-in-Memory Macro With Dynamic Voltage Sense Amplifier and Sparse-Aware Approximate Adder Tree. IEEE Trans. Circuits Syst. II Express Briefs 70(2): 416-420 (2023) - [j7]Lu Zhang
Pareto Frequency-Aware Power Side-Channel Countermeasure Exploration on CNN Systolic Array. IEEE Trans. Circuits Syst. II Express Briefs 70(3): 1124-1128 (2023) - [j6]Yaolei Li
A Weight-Reload-Eliminated Compute-in-Memory Accelerator for 60 fps 4K Super-Resolution. IEEE Trans. Circuits Syst. II Express Briefs 70(3): 1179-1183 (2023) - 2022
- [j5]Yixiong Yang
A 65-nm Energy-Efficient Interframe Data Reuse Neural Network Accelerator for Video Applications. IEEE J. Solid State Circuits 57(8): 2574-2585 (2022) - [j4]Jingyu Wang
PACA: A Pattern Pruning Algorithm and Channel-Fused High PE Utilization Accelerator for CNNs. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 41(11): 5043-5056 (2022) - [j3]Yuxuan Huang
Bit-Aware Fault-Tolerant Hybrid Retraining and Remapping Schemes for RRAM-Based Computing-in-Memory Systems. IEEE Trans. Circuits Syst. II Express Briefs 69(7): 3144-3148 (2022) - 2021
- [c5]Ruoyang Liu, Lu Zhang, Jingyu Wang, Huazhong Yang, Yongpan Liu:
PETRI: Reducing Bandwidth Requirement in Smart Surveillance by Edge-Cloud Collaborative Adaptive Frame Clustering and Pipelined Bidirectional Tracking. DAC 2021: 421-426 - [c4]Songming Yu
High Area/Energy Efficiency RRAM CNN Accelerator with Pattern-Pruning-Based Weight Mapping Scheme. NVMSA 2021: 1-6 - 2020
- [j2]Zhe Yuan, Yongpan Liu
STICKER: An Energy-Efficient Multi-Sparsity Compatible Accelerator for Convolutional Neural Networks in 65-nm CMOS. IEEE J. Solid State Circuits 55(2): 465-477 (2020) - [j1]Jingyu Wang
GAAS: An Efficient Group Associated Architecture and Scheduler Module for Sparse CNN Accelerators. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 39(12): 5170-5182 (2020) - [c3]Jingyu Wang, Songming Yu, Jinshan Yue, Zhe Yuan, Zhuqing Yuan, Huazhong Yang, Xueqing Li, Yongpan Liu:
High PE Utilization CNN Accelerator with Channel Fusion Supporting Pattern-Compressed Sparse Neural Networks. DAC 2020: 1-6 - [i1]Songming Yu, Yongpan Liu, Lu Zhang, Jingyu Wang, Jinshan Yue, Zhuqing Yuan, Xueqing Li, Huazhong Yang:
High Area/Energy Efficiency RRAM CNN Accelerator with Kernel-Reordering Weight Mapping Scheme Based on Pattern Pruning. CoRR abs/2010.06156 (2020)
2010 – 2019
- 2019
- [c2]Jingyu Wang, Zhe Yuan, Ruoyang Liu, Huazhong Yang, Yongpan Liu:
An N-way group association architecture and sparse data group association load balancing algorithm for sparse CNN accelerators. ASP-DAC 2019: 329-334 - [c1]Zhe Yuan, Jingyu Wang, Yixiong Yang, Jinshan Yue, Zhibo Wang, Xiaoyu Feng, Yanzhi Wang, Xueqing Li, Huazhong Yang, Yongpan Liu:
A Sparse-Adaptive CNN Processor with Area/Performance balanced N-Way Set-Associate PE Arrays Assisted by a Collision-Aware Scheduler. A-SSCC 2019: 61-64
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