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Jan Hoogerbrugge

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2020 – today

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2021
[c18]
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Pascal Nasahl, Robert Schilling, Mario Werner, Jan Hoogerbrugge, Marcel Medwed, Stefan Mangard:
CrypTag: Thwarting Physical and Logical Memory Vulnerabilities using Cryptographically Colored Memory. AsiaCCS 2021: 200-212
2020
[i1]
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Pascal Nasahl, Robert Schilling, Mario Werner, Jan Hoogerbrugge, Marcel Medwed, Stefan Mangard:
CrypTag: Thwarting Physical and Logical Memory Vulnerabilities using Cryptographically Colored Memory. CoRR abs/2012.06761 (2020)

2010 – 2019

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2013
[c17]
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Surendra Guntur, Feike Jansen, Jan Hoogerbrugge, Lotfi Abkari, Eric Vos:
Design of a multi GBPS Single Carrier digital baseband for 60GHz applications and its FPGA implementation. FPL 2013: 1-4
[c16]
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Jan Hoogerbrugge:
Variation tolerance and error resilience in a low power wireless receiver. ICCD 2013: 343-348
2012
[j5]
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Andrei Sergeevich Terechko, Jan Hoogerbrugge, Ghiath Alkadi, Surendra Guntur, Anirban Lahiri, Marc Duranton, Clemens C. Wüst, Phillip Christie, Axel Nackaerts, Aatish Kumar:
Balancing Programmability and Silicon Efficiency of Heterogeneous Multicore Architectures. ACM Trans. Embed. Comput. Syst. 11(S1): 14 (2012)
2011
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Jan Hoogerbrugge, Andrei Sergeevich Terechko:
A Multithreaded Multicore System for Embedded Media Processing. Trans. High Perform. Embed. Archit. Compil. 3: 154-173 (2011)
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Arnaldo Azevedo, Ben H. H. Juurlink, Cor Meenderinck, Andrei Sergeevich Terechko, Jan Hoogerbrugge, Mauricio Alvarez, Alex Ramírez, Mateo Valero:
A Highly Scalable Parallel Implementation of H.264. Trans. High Perform. Embed. Archit. Compil. 4: 111-134 (2011)

2000 – 2009

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2009
[c15]
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Arnaldo Azevedo, Cor Meenderinck, Ben H. H. Juurlink, Andrei Sergeevich Terechko, Jan Hoogerbrugge, Mauricio Alvarez, Alex Ramírez:
Parallel H.264 Decoding on an Embedded Multicore Processor. HiPEAC 2009: 404-418
2001
[c14]
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Basant Kumar Dwivedi, Jan Hoogerbrugge, Paul Stravers, M. Balakrishnan:
Exploring design space of parallel realizations: MPEG-2 decoder case study. CODES 2001: 92-97
2000
[c13]
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Jan Hoogerbrugge:
Dynamic Branch Prediction for a VLIW Processor. IEEE PACT 2000: 207-216
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Jan Hoogerbrugge, Lex Augusteijn:
Pipelined Java Virtual Machine Interpreters. CC 2000: 35-49
[c11]
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Jan Hoogerbrugge:
Cost-Efficient Branch Target Buffers. Euro-Par 2000: 950-959
[c10]
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Bernardo Kastrup, Jeroen Trum, Orlando Moreira, Jan Hoogerbrugge, Jef L. van Meerbergen:
Compiling Applications for ConCISe: An Example of Automatic HW/SW Partitioning and Synthesis. FPL 2000: 695-706

1990 – 1999

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1999
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Jan Hoogerbrugge, Lex Augusteijn:
Instruction Scheduling for TriMedia. J. Instr. Level Parallelism 1 (1999)
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Jan Hoogerbrugge, Lex Augusteijn, Jeroen Trum, Rik van de Wiel:
A Code Compression System Based on Pipelined Interpreters. Softw. Pract. Exp. 29(11): 1005-1023 (1999)
[c9]
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Michel Barreteau, François Bodin, Zbigniew Chamski, Henri-Pierre Charles, Christine Eisenbeis, John R. Gurd, Jan Hoogerbrugge, Ping Hu, William Jalby, Toru Kisuki, Peter M. W. Knijnenburg, Paul van der Mark, Andy Nisbet, Michael F. P. O'Boyle, Erven Rohou, André Seznec, Elena Stöhr, Menno Treffers, Harry A. G. Wijshoff:
OCEANS - Optimising Compilers for Embedded Applications. Euro-Par 1999: 1171-1175
[c8]
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Bernardo Kastrup, Arjan Bink, Jan Hoogerbrugge:
ConCISe: A Compiler-Driven CPLD-Based Instruction Set Accelerator. FCCM 1999: 92-
1998
[c7]
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Michel Barreteau, François Bodin, Peter Brinkhaus, Zbigniew Chamski, Henri-Pierre Charles, Christine Eisenbeis, John R. Gurd, Jan Hoogerbrugge, Ping Hu, William Jalby, Peter M. W. Knijnenburg, Michael F. P. O'Boyle, Erven Rohou, Rizos Sakellariou, André Seznec, Elena Stöhr, Menno Treffers, Harry A. G. Wijshoff:
OCEANS: Optimising Compilers for Embedded Applications. Euro-Par 1998: 1123-1130
1997
[c6]
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Bas Aarts, Michel Barreteau, François Bodin, Peter Brinkhaus, Zbigniew Chamski, Henri-Pierre Charles, Christine Eisenbeis, John R. Gurd, Jan Hoogerbrugge, Ping Hu, William Jalby, Peter M. W. Knijnenburg, Michael F. P. O'Boyle, Erven Rohou, Rizos Sakellariou, Henk Schepers, André Seznec, Elena Stöhr, Marco Verhoeven, Harry A. G. Wijshoff:
OCEANS: Optimizing Compilers for Embedded Applications. Euro-Par 1997: 1351-1356
1994
[c5]
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Jan Hoogerbrugge, Henk Corporaal:
Transport-Triggering versus Operation-Triggering. CC 1994: 435-449
[c4]
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Henk Corporaal, Jan Hoogerbrugge:
Code generation for transport triggered architectures. Code Generation for Embedded Processors 1994: 240-259
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Jan Hoogerbrugge, Henk Corporaal:
Register file port requirements of transport triggered architectures. MICRO 1994: 191-195
1992
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Jan Hoogerbrugge, Henk Corporaal:
Comparing Software Pipelining for an Operation-Triggered and a Tarnsport-Triggered Architecture. CC 1992: 219-228
1991
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Jan Hoogerbrugge, Henk Corporaal, Hans M. Mulder:
Software Pipelining for Transport-Triggered Architectures. MICRO 1991: 74-81

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