Low-Rank Training of Deep Neural Networks for Emerging Memory Technology - Albert Gural; Phillip M. Nadeau; Mehul Tikekar; Boris Murmann (CoRR, 2020)

A Fully Integrated Energy-Efficient H.265/HEVC Decoder With eDRAM for Wearable Devices - Mehul Tikekar; Vivienne Sze; Anantha P. Chandrakasan (IEEE J. Solid State Circuits, 2018)

Energy-efficient video decoding using data statistics - Mehul Tikekar (Massachusetts Institute of Technology, Cambridge, USA, 2017)

An Energy-Scalable Accelerator for Blind Image Deblurring - Priyanka Raina; Mehul Tikekar; Anantha P. Chandrakasan (IEEE J. Solid State Circuits, 2017)

An energy-scalable accelerator for blind image deblurring - Priyanka Raina; Mehul Tikekar; Anantha P. Chandrakasan (ESSCIRC Conference 2016: 42\(^nd\) European Solid-State Circuits Conference, Lausanne, Switzerland, September 12-15, 2016, 2016)

A 249-Mpixel/s HEVC Video-Decoder Chip for 4K Ultra-HD Applications - Mehul Tikekar; Chao-Tsung Huang; Chiraag Juvekar; Vivienne Sze; Anantha P. Chandrakasan (IEEE J. Solid State Circuits, 2014)

Memory-Hierarchical and Mode-Adaptive HEVC Intra Prediction Architecture for Quad Full HD Video Decoding - Chao-Tsung Huang; Mehul Tikekar; Anantha P. Chandrakasan (IEEE Trans. Very Large Scale Integr. Syst., 2014)

Energy and area-efficient hardware implementation of HEVC inverse transform and dequantization - Mehul Tikekar; Chao-Tsung Huang; Vivienne Sze; Anantha P. Chandrakasan (2014 IEEE International Conference on Image Processing, ICIP 2014, Paris, France, October 27-30, 2014, 2014)

Decoder Hardware Architecture for HEVC - Mehul Tikekar; Chao-Tsung Huang; Chiraag Juvekar; Vivienne Sze; Anantha P. Chandrakasan (High Efficiency Video Coding (HEVC), Algorithms and Architectures, 2014)

Technique for Efficient Evaluation of SRAM Timing Failure - Masood Qazi; Mehul Tikekar; Lara Dolecek; Devavrat Shah; Anantha P. Chandrakasan (IEEE Trans. Very Large Scale Integr. Syst., 2013)

A 249Mpixel/s HEVC video-decoder chip for Quad Full HD applications - Chao-Tsung Huang; Mehul Tikekar; Chiraag Juvekar; Vivienne Sze; Anantha P. Chandrakasan (2013 IEEE International Solid-State Circuits Conference - Digest of Technical Papers, ISSCC 2013, San Francisco, CA, USA, February 17-21, 2013, 2013)

HEVC interpolation filter architecture for quad full HD decoding - Chao-Tsung Huang; Chiraag Juvekar; Mehul Tikekar; Anantha P. Chandrakasan (2013 Visual Communications and Image Processing, VCIP 2013, Kuching, Malaysia, November 17-20, 2013, 2013)

Loop flattening & spherical sampling: Highly efficient model reduction techniques for SRAM yield analysis - Masood Qazi; Mehul Tikekar; Lara Dolecek; Devavrat Shah; Anantha P. Chandrakasan (Design, Automation and Test in Europe, DATE 2010, Dresden, Germany, March 8-12, 2010, 2010)