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Mehul Tikekar
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2020 – today
- 2020
- [i1]Albert Gural, Phillip M. Nadeau, Mehul Tikekar, Boris Murmann:
Low-Rank Training of Deep Neural Networks for Emerging Memory Technology. CoRR abs/2009.03887 (2020)
2010 – 2019
- 2018
- [j5]Mehul Tikekar, Vivienne Sze
, Anantha P. Chandrakasan:
A Fully Integrated Energy-Efficient H.265/HEVC Decoder With eDRAM for Wearable Devices. IEEE J. Solid State Circuits 53(8): 2368-2377 (2018) - 2017
- [b1]Mehul Tikekar:
Energy-efficient video decoding using data statistics. Massachusetts Institute of Technology, Cambridge, USA, 2017 - [j4]Priyanka Raina
An Energy-Scalable Accelerator for Blind Image Deblurring. IEEE J. Solid State Circuits 52(7): 1849-1862 (2017) - 2016
- [c5]Priyanka Raina, Mehul Tikekar, Anantha P. Chandrakasan:
An energy-scalable accelerator for blind image deblurring. ESSCIRC 2016: 113-116 - 2014
- [j3]Mehul Tikekar, Chao-Tsung Huang, Chiraag Juvekar, Vivienne Sze, Anantha P. Chandrakasan:
A 249-Mpixel/s HEVC Video-Decoder Chip for 4K Ultra-HD Applications. IEEE J. Solid State Circuits 49(1): 61-72 (2014) - [j2]Chao-Tsung Huang, Mehul Tikekar, Anantha P. Chandrakasan:
Memory-Hierarchical and Mode-Adaptive HEVC Intra Prediction Architecture for Quad Full HD Video Decoding. IEEE Trans. Very Large Scale Integr. Syst. 22(7): 1515-1525 (2014) - [c4]Mehul Tikekar, Chao-Tsung Huang, Vivienne Sze, Anantha P. Chandrakasan:
Energy and area-efficient hardware implementation of HEVC inverse transform and dequantization. ICIP 2014: 2100-2104 - [p1]Mehul Tikekar, Chao-Tsung Huang, Chiraag Juvekar, Vivienne Sze, Anantha P. Chandrakasan:
Decoder Hardware Architecture for HEVC. High Efficiency Video Coding 2014: 303-341 - 2013
- [j1]Masood Qazi, Mehul Tikekar, Lara Dolecek, Devavrat Shah, Anantha P. Chandrakasan:
Technique for Efficient Evaluation of SRAM Timing Failure. IEEE Trans. Very Large Scale Integr. Syst. 21(8): 1558-1562 (2013) - [c3]Chao-Tsung Huang, Mehul Tikekar, Chiraag Juvekar, Vivienne Sze, Anantha P. Chandrakasan:
A 249Mpixel/s HEVC video-decoder chip for Quad Full HD applications. ISSCC 2013: 162-163 - [c2]Chao-Tsung Huang, Chiraag Juvekar, Mehul Tikekar, Anantha P. Chandrakasan:
HEVC interpolation filter architecture for quad full HD decoding. VCIP 2013: 1-5 - 2010
- [c1]Masood Qazi, Mehul Tikekar, Lara Dolecek, Devavrat Shah, Anantha P. Chandrakasan:
Loop flattening & spherical sampling: Highly efficient model reduction techniques for SRAM yield analysis. DATE 2010: 801-806
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