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Abdsamad Benkrid
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2020 – today
- 2024
- [j9]Oluwarotimi Giwa, Abdsamad Benkrid
:
A new flame-based colour space for efficient fire detection. IET Image Process. 18(5): 1229-1244 (2024)
2010 – 2019
- 2018
- [i1]Oluwarotimi Giwa, Abdsamad Benkrid:
Fire detection in a still image using colour information. CoRR abs/1803.03828 (2018) - 2013
- [j8]Abdsamad Benkrid, Khaled Benkrid:
A statistical framework to minimise and predict the range values of quantisation errors in fixed-point FIR filters architectures. Digit. Signal Process. 23(1): 453-469 (2013) - 2012
- [c19]Chris Ponder, Khaled Benkrid, Abdsamad Benkrid:
A generic computer platform for efficient iris recognition. ICB 2012: 251-256
2000 – 2009
- 2009
- [j7]Khaled Benkrid, Ying Liu, Abdsamad Benkrid:
A Highly Parameterized and Efficient FPGA-Based Skeleton for Pairwise Biological Sequence Alignment. IEEE Trans. Very Large Scale Integr. Syst. 17(4): 561-570 (2009) - [j6]Abdsamad Benkrid, Khaled Benkrid:
Novel Area-Efficient FPGA Architectures for FIR Filtering With Symmetric Signal Extension. IEEE Trans. Very Large Scale Integr. Syst. 17(5): 709-722 (2009) - [c18]Ying Liu, Khaled Benkrid, Abdsamad Benkrid, Server Kasap
An FPGA-Based Web Server for High Performance Biological Sequence Alignment. AHS 2009: 361-368 - 2008
- [j5]Abdsamad Benkrid, Khaled Benkrid:
HIDE+: A Logic Based Hardware Development Environment. Eng. Lett. 16(3): 460-468 (2008) - 2007
- [j4]Khaled Benkrid, Abdsamad Benkrid, Samir Belkacemi:
Efficient FPGA hardware development: A multi-language approach. J. Syst. Archit. 53(4): 184-209 (2007) - [c17]Khaled Benkrid, Ying Liu, Abdsamad Benkrid:
Design and Implementation of a Highly Parameterised FPGA-Based Skeleton for Pairwise Biological Sequence Alignment. FCCM 2007: 275-278 - [c16]Khaled Benkrid, Ying Liu, Abdsamad Benkrid:
High Performance Biosequence Database Scanning using FPGAs. ICASSP (1) 2007: 361-364 - 2006
- [j3]Khaled Benkrid, Samir Belkacemi, Abdsamad Benkrid:
HIDE: A hardware intelligent description environment. Microprocess. Microsystems 30(6): 283-300 (2006) - [j2]Abdsamad Benkrid, Khaled Benkrid:
Handling finite length signals borders in two-channel multirate filter banks for perfect reconstruction. Signal Process. 86(2): 375-387 (2006) - 2004
- [c15]Abdsamad Benkrid, Khaled Benkrid, Danny Crookes:
Design and Implementation of Novel FIR Filter Architecture for Efficient Signal Boundary Handling on Xilinx VIRTEX FPGAs. ISVLSI 2004: 222-225 - 2003
- [c14]Abdsamad Benkrid, Khaled Benkrid, Danny Crookes:
Design and Implementation of a Generic 2-D Orthogonal Discrete Wavelet Transform on FPGA. FCCM 2003: 162-172 - [c13]Abdsamad Benkrid, Khaled Benkrid, Danny Crookes:
A Novel FIR Filter Architecture for Efficient Signal Boundary Handling on Xilinx VIRTEX FPGAs. FCCM 2003: 273-275 - [c12]Abdsamad Benkrid, Danny Crookes, Khaled Benkrid:
Design framework for the implementation of the 2-D orthogonal discrete wavelet transform on FPGA. FPGA 2003: 238 - [c11]Abdsamad Benkrid, Khaled Benkrid, Danny Crookes:
Design and Implementation of a Novel FIR Filter Architecture with Boundary Handling on Xilinx VIRTEX FPGAs. FPL 2003: 553-564 - [c10]Khaled Benkrid, S. Sukhsawas, Danny Crookes, Abdsamad Benkrid:
An FPGA-Based Image Connected Component Labeller. FPL 2003: 1012-1015 - [c9]Abdsamad Benkrid, Khaled Benkrid, Danny Crookes:
A novel approach for diminishing and predicting the error dynamic range in finite wordlength FIR based architectures. ICASSP (2) 2003: 581-584 - [c8]Abdsamad Benkrid, Khaled Benkrid, Danny Crookes:
Minimisation and prediction of the error dynamic range in finite wordlength FIR based architectures: application to the 2-D orthogonal DWT. ISSPA (2) 2003: 283-286 - 2002
- [j1]Khaled Benkrid, Danny Crookes, Abdsamad Benkrid:
Towards a general framework for FPGA based image processing using hardware skeletons. Parallel Comput. 28(7-8): 1141-1154 (2002) - [c7]Khaled Benkrid, Danny Crookes, Abdsamad Benkrid, Samir Belkacemi:
A Prolog-Based Hardware Development Environment. FPL 2002: 370-380 - [c6]Abdsamad Benkrid, Khaled Benkrid, Danny Crookes:
Design and implementation of a novel architecture for symmetric FIR filters with boundary handling on Xilinx Virtex FPGAs. FPT 2002: 356-359 - [c5]Khaled Benkrid, Danny Crookes, Abdsamad Benkrid:
Design and implementation of a novel algorithm for general purpose median filtering on FPGAs. ISCAS (4) 2002: 425-428 - 2001
- [c4]Abdsamad Benkrid, Danny Crookes, Khaled Benkrid:
Design and Implementation of a Generic 2-D Biorthogonal Discrete Wavelet Transform on an FPGA. FCCM 2001: 190-198 - [c3]Khaled Benkrid, Danny Crookes, J. Smith, Abdsamad Benkrid:
High Level Programming for FPGA Based Image and Video Processing Using Hardware Skeletons. FCCM 2001: 219-226 - 2000
- [c2]Khaled Benkrid, Danny Crookes, J. Smith, Abdsamad Benkrid:
High level programming for real time FPGA based video processing. ICASSP 2000: 3227-3230
1990 – 1999
- 1998
- [c1]Danny Crookes, Khalid Alotaibi, Ahmed Bouridane, Paul Donachy, Abdsamad Benkrid:
An Environment for Generating FPGA Architectures for Image Algebra-based Algorithms. ICIP (3) 1998: 990-994
Coauthor Index
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