A scalable symbolic simulation tool for low power embedded systems. - Sethumurugan, Subhash; Hegde, Shashank; Cherupalli, Hari; Sartori, John (2022)

Towards Fairness and Interpretability: Clinical Decision Support for Acute Coronary Syndrome. - Sahoo, Himanshu S.; Ingraham, Nicholas; Silverman, Greg M.; Sartori, John (2022)

Solar Textiles for Off-grid Populations in Sub-Saharan Africa. - Adeleke, Olaitan; Woelfle, Heidi; Sartori, John; Dunne, Lucy E. (2022)

NLP Methods for Extraction of Symptoms from Unstructured Data for Use in Prognostic COVID-19 Analytic Models. - Silverman, Greg M.; Sahoo, Himanshu S.; Ingraham, Nicholas; Lupei, Monica; Puskarich, Michael A.; Usher, Michael; Dries, James; Finzel, Raymond L.; Murray, Eric; Sartori, John; Simon, György J.; Zhang, Rui; et al. (J. Artif. Intell. Res., 2021)

Constrained Conservative State Symbolic Co-analysis for Ultra-low-power Embedded Systems. - Hegde, Shashank; Sethumurugan, Subhash; Cherupalli, Hari; Duwe, Henry; Sartori, John (2021)

Property-driven Automatic Generation of Reduced-ISA Hardware. - Bleier, Nathaniel; Sartori, John; Kumar, Rakesh (2021)

Designing a Cost-Effective Cache Replacement Policy using Machine Learning. - Sethumurugan, Subhash; Yin, Jieming; Sartori, John (2021)

DImplementing First-order Optimization Methods: Algorithmic Considerations and Bespoke Microcontrollers. - Zhang, Xinwei; Sartori, John; Hong, Mingyi; Dhople, Sairaj V. (2019)

Approximate Communication: Techniques for Reducing Communication Bottlenecks in Large-Scale Parallel Systems. - Betzel, Filipe; Khatamifard, S. Karen; Suresh, Harini; Lilja, David J.; Sartori, John; Karpuzcu, Ulya R. (ACM Comput. Surv., 2018)

Bespoke Processors for Applications with Ultra-Low Area and Power Constraints. - Cherupalli, Hari; Duwe, Henry; Ye, Weidong; Kumar, Rakesh; Sartori, John (IEEE Micro, 2018)

Enhancing workload-dependent voltage scaling for energy-efficient ultra-low-power embedded systems. - Mohan, Veni; Iyer, Akhilesh; Sartori, John (2018)

Ultra-Low-Power Processors. - Brooks, David; Sartori, John (IEEE Micro, 2017)

Determining Application-Specific Peak Power and Energy Requirements for Ultra-Low-Power Processors. - Cherupalli, Hari; Duwe, Henry; Ye, Weidong; Kumar, Rakesh; Sartori, John (ACM Trans. Comput. Syst., 2017)

Determining Application-specific Peak Power and Energy Requirements for Ultra-low Power Processors. - Cherupalli, Hari; Duwe, Henry; Ye, Weidong; Kumar, Rakesh; Sartori, John (2017)

Approximate compression: enhancing compressibility through data approximation. - Suresh, Harini; Hegde, Shashank; Sartori, John (2017)

Enabling Effective Module-Oblivious Power Gating for Embedded Processors. - Cherupalli, Hari; Duwe, Henry; Ye, Weidong; Kumar, Rakesh; Sartori, John (2017)

Scalable N-worst algorithms for dynamic timing and activity analysis. - Cherupalli, Hari; Sartori, John (2017)

Bespoke Processors for Applications with Ultra-low Area and Power Constraints. - Cherupalli, Hari; Duwe, Henry; Ye, Weidong; Kumar, Rakesh; Sartori, John (2017)

Software-based gate-level information flow security for IoT systems. - Cherupalli, Hari; Duwe, Henry; Ye, Weidong; Kumar, Rakesh; Sartori, John (2017)

Automated Algorithmic Error Resilience Based on Outlier Detection. - Suresh, Amoghavarsha; Sartori, John (IEEE Micro, 2016)

Automated error prediction for approximate sequential circuits. - Kapare, Amrut; Cherupalli, Hari; Sartori, John (2016)

Exploiting Dynamic Timing Slack for Energy Efficiency in Ultra-Low-Power Embedded Systems. - Cherupalli, Hari; Kumar, Rakesh; Sartori, John (2016)

Graph-based Dynamic Analysis: Efficient Characterization of Dynamic Timing and Activity Distributions. - Cherupalli, Hari; Sartori, John (2015)

GPU-Accelerated Nick Local Image Thresholding Algorithm. - Najafi, M. Hassan; Murali, Anirudh; Lilja, David J.; Sartori, John (2015)

Automated Algorithmic Error Resilience for Structured Grid Problems Based on Outlier Detection. - Suresh, Amoghavarsha; Sartori, John (2014)

Software canaries: software-based path delay fault testing for variation-aware energy-efficient design. - Sartori, John; Kumar, Rakesh (2014)

High Performance, Energy Efficient Chipkill Correct Memory with Multidimensional Parity. - Jian, Xun; Sartori, John; Duwe, Henry; Kumar, Rakesh (IEEE Comput. Archit. Lett., 2013)

Exploiting Timing Error Resilience in Processor Architecture. - Sartori, John; Kumar, Rakesh (ACM Trans. Embed. Comput. Syst., 2013)

Branch and Data Herding: Reducing Control and Memory Divergence for Error-Tolerant GPU Applications. - Sartori, John; Kumar, Rakesh (IEEE Trans. Multim., 2013)

Enhancing the Efficiency of Energy-Constrained DVFS Designs. - Kahng, Andrew B.; Kang, Seokhyeong; Kumar, Rakesh; Sartori, John (IEEE Trans. Very Large Scale Integr. Syst., 2013)

Statistical analysis and modeling for error composition in approximate computation circuits. - Chan, Wei-Ting Jonas; Kahng, Andrew B.; Kang, Seokhyeong; Kumar, Rakesh; Sartori, John (2013)

Low-power, low-storage-overhead chipkill correct via multi-line error correction. - Jian, Xun; Duwe, Henry; Sartori, John; Sridharan, Vilas; Kumar, Rakesh (2013)

Programmable stochastic processors - Sartori, John (2012)

Recovery-Driven Design: Exploiting Error Resilience in Design of Energy-Efficient Processors. - Kahng, Andrew B.; Kang, Seokhyeong; Kumar, Rakesh; Sartori, John (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2012)

Branch and data herding: reducing control and memory divergence for error-tolerant GPU applications. - Sartori, John; Kumar, Rakesh (2012)

On software design for stochastic processors. - Sloan, Joseph; Sartori, John; Kumar, Rakesh (2012)

Compiling for energy efficiency on timing speculative processors. - Sartori, John; Kumar, Rakesh (2012)

Power balanced pipelines. - Sartori, John; Ahrens, Ben; Kumar, Rakesh (2012)

Stochastic Computing. - Sartori, John; Kumar, Rakesh (Found. Trends Electron. Des. Autom., 2011)

Architecting processors to allow voltage/reliability tradeoffs. - Sartori, John; Kumar, Rakesh (2011)

Stochastic computing: embracing errors in architectureand design of processors and applications. - Sartori, John; Sloan, Joseph; Kumar, Rakesh (2011)

On the efficacy of NBTI mitigation techniques. - Chan, Tuck-Boon; Sartori, John; Gupta, Puneet; Kumar, Rakesh (2011)

Slack redistribution for graceful degradation under voltage overscaling. - Kahng, Andrew B.; Kang, Seokhyeong; Kumar, Rakesh; Sartori, John (2010)

Recovery-driven design: a power minimization methodology for error-tolerant processor modules. - Kahng, Andrew B.; Kang, Seokhyeong; Kumar, Rakesh; Sartori, John (2010)

Scalable stochastic processors. - Narayanan, Sriram; Sartori, John; Kumar, Rakesh; Jones, Douglas L. (2010)

Overscaling-friendly timing speculation architectures. - Sartori, John; Kumar, Rakesh (2010)

Low-Overhead, High-Speed Multi-core Barrier Synchronization. - Sartori, John; Kumar, Rakesh (2010)

Designing a processor from the ground up to allow voltage/reliability tradeoffs. - Kahng, Andrew B.; Kang, Seokhyeong; Kumar, Rakesh; Sartori, John (2010)

Optimal power/performance pipelining for error resilient processors. - Zea, Nicolas; Sartori, John; Ahrens, Ben; Kumar, Rakesh (2010)

Variation-aware speed binning of multi-core processors. - Sartori, John; Pant, Aashish; Kumar, Rakesh; Gupta, Puneet (2010)

Distributed peak power management for many-core architectures. - Sartori, John; Kumar, Rakesh (2009)

Three scalable approaches to improving many-core throughput for a given peak power budget. - Sartori, John; Kumar, Rakesh (2009)

Servo: a programming model for many-core computing. - Zea, Nicolas; Sartori, John; Kumar, Rakesh (SIGARCH Comput. Archit. News, 2008)