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Shuo-Hung Hsu
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2020 – today
- 2023
- [c10]Ding-Hao Wang, Shuo-Hung Hsu, Shu-Hsiang Yang, Pei-Ju Lin, Hui-Ting Yang, Mark Po-Hung Lin:
Late Breaking Results: PVT-Sensitive Delay Fitting for High-Performance Computing. DAC 2023: 1-2
2010 – 2019
- 2012
- [j1]Ching-Te Chiu, Yu-Hao Hsu, Jen-Ming Wu, Shuo-Hung Hsu, Min-Sheng Kao, Hou-Cheng Tzeng, Ming-Chang Du, Ping-Ling Yang, Ming-Hao Lu, Fanta Chen, Hung-Yu Lin, Yarsun Hsu:
An 8 × 8 20 Gbps Reconfigurable Load Balanced TDM Switch IC for High-Speed Networking. J. Signal Process. Syst. 66(1): 57-73 (2012) - 2011
- [c9]Yu-Hao Hsu, Yang-Syu Lin, Ching-Te Chiu, Jen-Ming Wu, Shuo-Hung Hsu, Fanta Chen, Min-Sheng Kao, Wei-Chih Lai, Yarsun Hsu:
A 32Gbps low propagation delay 4×4 switch IC for feedback-based system in 0.13μm CMOS technology. ASP-DAC 2011: 105-106 - [c8]Fanta Chen, Min-Sheng Kao, Yu-Hao Hsu, Chih-Hsing Lin, Jen-Ming Wu, Ching-Te Chiu, Shuo-Hung Hsu:
A 10 to 11.5GHz rotational phase and frequency detector for clock recovery circuit. ISCAS 2011: 185-188 - 2010
- [c7]Yu-Hao Hsu, Yang-Syu Lin, Ching-Te Chiu, Jen-Ming Wu, Shuo-Hung Hsu, Fanta Chen, Min-Sheng Kao, Yarsun Hsu:
A 32Gbps low propagation delay 4×4 switch IC for feedback-based system in 0.13μm CMOS technology. ISCAS 2010: 581-584 - [c6]Chih-Hsing Lin, Yung-Chang Chang, Wen-Chih Huang, Wei-Chih Lai, Ching-Te Chiu, Jen-Ming Wu, Shuo-Hung Hsu, Chun-Ming Huang, Chih-Chyau Yang, Shih-Lun Chen:
A packet-based emulating platform with serializer/deserializer interface for heterogeneous IP verification. ISCAS 2010: 1061-1064 - [c5]Wei-Yu Tsai, Ching-Te Chiu, Jen-Ming Wu, Shuo-Hung Hsu, Yarsun Hsu:
A novel MUX-FF circuit for low power and high speed serial link interfaces. ISCAS 2010: 4305-4308
2000 – 2009
- 2008
- [c4]Yu-Hao Hsu, Ming-Hao Lu, Ping-Ling Yang, Fanta Chen, You-Hung Li, Min-Sheng Kao, Chih-Hsing Lin, Ching-Te Chiu, Jen-Ming Wu, Shuo-Hung Hsu, Yarsun Hsu:
A 28Gbps 4×4 switch with low jitter SerDes using area-saving RF model in 0.13µm CMOS technology. ISCAS 2008: 3086-3089 - 2007
- [c3]Yu-Hao Hsu, Min-Sheng Kao, Hou-Cheng Tzeng, Ching-Te Chiu, Jen-Ming Wu, Shuo-Hung Hsu:
A 20 Gbps Scalable Load Balanced Birkhoff-von Neumann Symmetric TDM Switch IC with SERDES Interfaces. ASP-DAC 2007: 102-103 - [c2]Ching-Te Chiu, Yu-Hao Hsu, Min-Sheng Kao, Hou-Cheng Tzeng, Ming-Chang Du, Ping-Ling Yang, Ming-Hao Lu, Fanta Chen, Hung-Yu Lin, Jen-Ming Wu, Shuo-Hung Hsu, Yarsun Hsu:
A Scalable Load Balanced Birkhoff-von Neumann Symmetric TDM Switch IC for High-Speed Networking Applications. ISCAS 2007: 2754-2757 - 2005
- [c1]Ching-Te Chiu, Jen-Ming Wu, Shuo-Hung Hsu, Min-Sheng Kao, Chih-Hsien Jen, Yarsun Hsu:
A 10 Gb/s Wide-Band Current-Mode Logic I/O Interface for High-Speed Interconnect in 0.18μm CMOS Technology. SoCC 2005: 257-260
Coauthor Index
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