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Robert B. Jones
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2000 – 2009
- 2008
- [j6]Michael S. Hsiao, Robert B. Jones:
Introduction to special section on high-level design, validation, and test. ACM Trans. Design Autom. Electr. Syst. 13(1): 2:1 (2008) - [e2]Alessandro Cimatti, Robert B. Jones:
Formal Methods in Computer-Aided Design, FMCAD 2008, Portland, Oregon, USA, 17-20 November 2008. IEEE 2008, ISBN 978-1-4244-2735-2 [contents] - 2006
- [c13]Sava Krstic, Robert B. Jones, John O'Leary:
Mothers of Pipelines. PDPAR/PaUL@FLoC 2006: 7-22 - [e1]Thomas Ball, Robert B. Jones:
Computer Aided Verification, 18th International Conference, CAV 2006, Seattle, WA, USA, August 17-20, 2006, Proceedings. Lecture Notes in Computer Science 4144, Springer 2006, ISBN 3-540-37406-X [contents] - 2005
- [j5]Carl-Johan H. Seger, Robert B. Jones, John W. O'Leary, Thomas F. Melham, Mark D. Aagaard, Clark W. Barrett
, Don Syme:
An industrially effective environment for formal hardware verification. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 24(9): 1381-1405 (2005) - 2004
- [c12]Mark D. Aagaard, Nancy A. Day, Robert B. Jones:
Synchronization-at-Retirement for Pipeline Verification. FMCAD 2004: 113-127 - 2003
- [j4]Mark D. Aagaard, Byron Cook, Nancy A. Day, Robert B. Jones:
A framework for superscalar microprocessor correctness statements. Int. J. Softw. Tools Technol. Transf. 4(3): 298-312 (2003) - 2002
- [j3]Robert B. Jones, Jens U. Skakkebæk, David L. Dill:
Formal Verification of Out-of-Order Execution with Incremental Flushing. Formal Methods Syst. Des. 20(2): 139-158 (2002) - [c11]Thomas F. Melham, Robert B. Jones:
Abstraction by Symbolic Indexing Transformations. FMCAD 2002: 1-18 - 2001
- [j2]Robert B. Jones, John W. O'Leary, Carl-Johan H. Seger, Mark D. Aagaard, Thomas F. Melham:
Practical Formal Verification in Microprocessor Design. IEEE Des. Test Comput. 18(4): 16-25 (2001) - [c10]Mark D. Aagaard, Byron Cook, Nancy A. Day, Robert B. Jones:
A Framework for Microprocessor Correctness Statements. CHARME 2001: 433-448 - 2000
- [c9]Mark D. Aagaard, Robert B. Jones, Roope Kaivola, Katherine R. Kohatsu, Carl-Johan H. Seger:
Formal verification of iterative algorithms in microprocessors. DAC 2000: 201-206 - [c8]Mark D. Aagaard, Robert B. Jones, Thomas F. Melham, John W. O'Leary, Carl-Johan H. Seger:
A Methodology for Large-Scale Hardware Verification. FMCAD 2000: 263-282
1990 – 1999
- 1999
- [c7]Mark D. Aagaard, Robert B. Jones, Carl-Johan H. Seger:
Parametric Representations of Boolean Constraints. DAC 1999: 402-407 - [c6]Mark D. Aagaard, Robert B. Jones, Carl-Johan H. Seger:
Lifted-FL: A Pragmatic Implementation of Combined Model Checking and Theorem Proving. TPHOLs 1999: 323-340 - 1998
- [c5]Jens U. Skakkebæk, Robert B. Jones, David L. Dill:
Formal Verification of Out-of-Order Execution Using Incremental Flushing. CAV 1998: 98-109 - [c4]Mark D. Aagaard, Robert B. Jones, Carl-Johan H. Seger:
Combining Theorem Proving and Trajectory Evaluation in an Industrial Environment. DAC 1998: 538-541 - [c3]Robert B. Jones, Jens U. Skakkebæk, David L. Dill:
Reducing Manual Abstraction in Formal Verification of Out-of-Order Execution. FMCAD 1998: 2-17 - 1996
- [c2]Robert B. Jones, Carl-Johan H. Seger, David L. Dill:
Self-Consistency Checking. FMCAD 1996: 159-171 - 1995
- [c1]Robert B. Jones, David L. Dill, Jerry R. Burch:
Efficient validity checking for processor verification. ICCAD 1995: 2-6 - 1991
- [j1]T. R. Girill, Thomas D. Griffin, Robert B. Jones:
Extended subject access to hypertext online documentation, Parts I and II: The search-support and maintenance problems. J. Am. Soc. Inf. Sci. 42(6): 414-426 (1991)
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