An analytical placer for heterogeneous FPGAs via rough-placed packing. - Wu, Wan-Ning; Chen, Chen; Chin, Ching-Yu; Wang, Chun-Kai; Chen, Hung-Ming (2017)

A Fast Prototyping Framework for Analog Layout Migration With Planar Preservation. - Pan, Po-Cheng; Chin, Ching-Yu; Chen, Hung-Ming; Chen, Tung-Chieh; Lee, Chin-Chieh; Lin, Jou-Chun (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2015)

Closing the Gap between Global and Detailed Placement: Techniques for Improving Routability. - Wang, Chun-Kai; Huang, Chuan-Chia; Liu, Shih-Ying Sean; Chin, Ching-Yu; Hu, Sheng-Te; Wu, Wei-Chen; Chen, Hung-Ming (2015)

Clock Tree Synthesis Considering Slew Effect on Supply Voltage Variation. - Wang, Chun-Kai; Chang, Yeh-Chi; Chen, Hung-Ming; Chin, Ching-Yu (ACM Trans. Design Autom. Electr. Syst., 2014)

Fast Thermal Aware Placement With Accurate Thermal Analysis Based on Green Function. - Liu, Shih-Ying Sean; Luo, Ren-Guo; Aroonsantidecha, Suradeth; Chin, Ching-Yu; Chen, Hung-Ming (IEEE Trans. Very Large Scale Integr. Syst., 2014)

Escaped Boundary Pins Routing for High-Speed Boards. - Chin, Ching-Yu; Kuan, Chung-Yi; Tsai, Tsung-Ying; Chen, Hung-Ming; Kajitani, Yoji (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2013)

Efficient analog layout prototyping by layout reuse with routing preservation. - Chin, Ching-Yu; Pan, Po-Cheng; Chen, Hung-Ming; Chen, Tung-Chieh; Lin, Jou-Chun (2013)

A fast thermal aware placement with accurate thermal analysis based on Green function. - Aroonsantidecha, Suradeth; Liu, Shih-Ying; Chin, Ching-Yu; Chen, Hung-Ming (2012)

A Novel Test Flow for One-Time-Programming Applications of NROM Technology. - Chao, Mango Chia-Tso; Chin, Ching-Yu; Tsou, Yao-Te; Chang, Chi-Min (IEEE Trans. Very Large Scale Integr. Syst., 2011)

On routing fixed escaped boundary pins for high speed boards. - Tsai, Tsung-Ying; Lee, Ren-Jie; Chin, Ching-Yu; Kuan, Chung-Yi; Chen, Hung-Ming; Kajitani, Yoji (2011)

Mathematical yield estimation for two-dimensional-redundancy memory arrays. - Chao, Mango Chia-Tso; Chin, Ching-Yu; Lin, Chen-Wei (2010)

Fault models for embedded-DRAM macros. - Chao, Mango Chia-Tso; Yang, Hao-Yu; Huang, Rei-Fu; Lin, Shih-Chin; Chin, Ching-Yu (2009)

A novel test flow for one-time-programming applications of NROM technology. - Chin, Ching-Yu; Tsou, Yao-Te; Chang, Chi-Min; Chao, Mango Chia-Tso (2009)