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Chih-Hao Huang
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2020 – today
- 2021
- [j8]Feras A. Batarseh
, Laura J. Freeman, Chih-Hao Huang:
A survey on artificial intelligence assurance. J. Big Data 8(1): 1-30 (2021) - [c11]Feras A. Batarseh, Chih-Hao Huang:
Measuring Outcomes in Healthcare Economics using Artificial Intelligence: with Application to Resource Allocation. FLAIRS 2021 - [i1]Chih-Hao Huang, Feras A. Batarseh, Adel Boueiz, Ajay Kulkarni, Po-Hsuan Su, Jahan Aman:
Measuring Outcomes in Healthcare Economics using Artificial Intelligence: with Application to Resource Management. CoRR abs/2111.07503 (2021) - 2020
- [c10]Chih-Hao Huang, Bo-Hong Huang, Tin-Yu Wu:
Hardware Resource Reliability Analysis based on Deep Learning for Virtual Machine Deployment Optimization. GCCE 2020: 726-727
2010 – 2019
- 2011
- [j7]Jin-Fu Lin, Soon-Jyh Chang, Te-Chieh Kung, Hsin-Wen Ting, Chih-Hao Huang:
Transition-Code Based Linearity Test Method for Pipelined ADCs With Digital Error Correction. IEEE Trans. Very Large Scale Integr. Syst. 19(12): 2158-2169 (2011) - 2010
- [j6]Alessandra Fanfani, M. Anzar Afaq, Jose Afonso Sanches, Julia Andreeva, Giuseppe Bagliesi, Lothar Bauerdick, Stefano Belforte
Distributed Analysis in CMS. J. Grid Comput. 8(2): 159-179 (2010) - [j5]Jin-Fu Lin, Soon-Jyh Chang, Chun-Cheng Liu, Chih-Hao Huang:
A 10-bit 60-MS/s Low-Power Pipelined ADC With Split-Capacitor CDS Technique. IEEE Trans. Circuits Syst. II Express Briefs 57-II(3): 163-167 (2010) - [c9]Chun-Cheng Liu, Soon-Jyh Chang, Guan-Ying Huang, Ying-Zu Lin, Chung-Ming Huang, Chih-Hao Huang, Linkai Bu, Chih-Chung Tsai:
A 10b 100MS/s 1.13mW SAR ADC with binary-scaled error compensation. ISSCC 2010: 386-387
2000 – 2009
- 2009
- [j4]Jiang-Liang Hou, Chih-Hao Huang:
Algorithms for the determination of document authentication time and the recommendation of document modification. Expert Syst. Appl. 36(3): 5992-6009 (2009) - [c8]Jin-Fu Lin, Soon-Jyh Chang, Chih-Hao Huang:
Design-for-Test Circuit for the Reduced Code Based Linearity Test Method in Pipelined ADCs with Digital Error Correction Technique. Asian Test Symposium 2009: 57-62 - 2008
- [j3]Jiang-Liang Hou, Chih-Hao Huang:
A Model for Document Validation Using Concurrent Authentication Processes. J. Comput. Inf. Syst. 49(2): 65-80 (2008) - 2006
- [j2]Jiang-Liang Hou, Chih-Hao Huang:
Quantitative performance evaluation of RFID applications in the supply chain of the printing industry. Ind. Manag. Data Syst. 106(1): 96-120 (2006) - [c7]Chih-Wei Yi
Asymptotic Distribution of The Number of Isolated Nodes in Wireless Ad Hoc Networks with Unreliable Nodes and Links. GLOBECOM 2006 - 2005
- [j1]James T. Lin, Jiang-Liang Hou, Wei-Ching Chen, Chih-Hao Huang:
An RFID Application Model for the Publication Industry: A Taiwan Perspective. Int. J. Electron. Bus. Manag. 3(2): 129-139 (2005) - [c6]Gene Oleynik, Bonnie Alcorn, Wayne Baisley, Jon Bakken, David Berg, Eileen Berman, Chih-Hao Huang, Terry Jones, Robert D. Kennedy, Alexander Kulyavtsev, Alexander Moibenko, Timur Perelmutov, Donald Petravick, Vladimir Podstavkov, George Szmuksta, Michael Zalokar:
Fermilab's Multi-Petabyte Scalable Mass Storage System. MSST 2005: 73-80 - 2003
- [c5]Hsin-Lei Lin, Robert Chen-Hao Chang, Chih-Hao Huang, Hongchin Lin:
A flexible design of a decision feedback equalizer and a novel CCK technique for wireless LAN systems. ISCAS (2) 2003: 153-156 - [c4]Jon Bakken, Eileen Berman, Chih-Hao Huang, Alexander Moibenko, Donald Petravick, Michael Zalokar:
The Fermilab Data Storage Infrastructure. IEEE Symposium on Mass Storage Systems 2003: 101-104
1990 – 1999
- 1991
- [c3]Chih-Hao Huang, Jie-Yong Juang:
Information caching in the execution of logic programs. COMPSAC 1991: 288-293 - 1990
- [c2]Chih-Hao Huang, Jie-Yong Juang:
A Partial Compaction Scheme for Processor Allocation in Hypercube Multiprocessors. ICPP (1) 1990: 211-217
1980 – 1989
- 1989
- [c1]Chih-Hao Huang, Ting-Lu Huang, Jie-Yong Juang:
On processor allocation in hypercube multiprocessors. COMPSAC 1989: 16-23
Coauthor Index
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