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2020 – today
- 2024
- [c160]Paul Delestrac, Jonathan Miquel, Debjyoti Bhattacharjee, Diksha Moolchandani, Francky Catthoor, Lionel Torres, David Novo:
Analyzing GPU Energy Consumption in Data Movement and Storage. ASAP 2024: 143-151 - [c159]Paul Delestrac, Debjyoti Bhattacharjee, Simei Yang, Diksha Moolchandani, Francky Catthoor, Lionel Torres, David Novo:
Multi-Level Analysis of GPU Utilization in ML Training Workloads. DATE 2024: 1-6 - 2022
- [c158]Quentin Huppert, Francky Catthoor, Lionel Torres, David Novo:
Pref-X: a framework to reveal data prefetching in commercial in-order cores. DAC 2022: 1051-1056 - [c157]Paul Delestrac
, Lionel Torres, David Novo:
Demystifying the TensorFlow Eager Execution of Deep Learning Inference on a CPU-GPU Tandem. DSD 2022: 446-455 - 2021
- [c156]Quentin Huppert, Timon Evenblij, Manu Perumkunnil, Francky Catthoor, Lionel Torres, David Novo:
Memory Hierarchy Calibration Based on Real Hardware In-order Cores for Accurate Simulation. DATE 2021: 707-710 - 2020
- [j37]Arash Nejat
Practical Experiments to Evaluate Quality Metrics of MRAM-Based Physical Unclonable Functions. IEEE Access 8: 176042-176049 (2020) - [c155]Mehdi Baradaran Tahoori, Sarath Mohanachandran Nair, Rajendra Bishnoi, Lionel Torres, Sophiane Senni, Guillaume Patrigeon, Pascal Benoit, Gregory di Pendina, Guillaume Prenat:
A Universal Spintronic Technology based on Multifunctional Standardized Stack. DATE 2020: 394-399 - [c154]Florent Bruguier, Emmanuelle Lecointre, Beatrice Pradarelli, Loic Dalmasso, Pascal Benoit, Lionel Torres:
Teaching Hardware Security: Earnings of an Introduction Proposed as an Escape Game. REV 2020: 729-741
2010 – 2019
- 2019
- [j36]Loic Dalmasso
Evaluation of SPN-Based Lightweight Crypto-Ciphers. IEEE Access 7: 10559-10567 (2019) - [j35]Guillaume Patrigeon, Pascal Benoit, Lionel Torres, Sophiane Senni, Guillaume Prenat, Gregory di Pendina:
Design and Evaluation of a 28-nm FD-SOI STT-MRAM for Ultra-Low Power Microcontrollers. IEEE Access 7: 58085-58093 (2019) - [j34]Frederic Ouattara
Practical Experiments on Fabricated TAS-MRAM Dies to Evaluate the Stochastic Behavior of Voltage-Controlled TRNGs. IEEE Access 7: 59271-59277 (2019) - [c153]Pascal Benoit, Loic Dalmasso, Guillaume Patrigeon, Thierry Gil, Florent Bruguier, Lionel Torres:
Edge-Computing Perspectives with Reconfigurable Hardware. ReCoSoC 2019: 51-58 - [c152]Guillaume Patrigeon
FlexNode: a reconfigurable Internet of Things node for design evaluation. SAS 2019: 1-6 - 2018
- [j33]Mohamad El Ahmad, Mohamad Najem, Pascal Benoit, Gilles Sassatelli, Lionel Torres:
PoETE: A Method to Design Temperature-Aware Integrated Systems. J. Low Power Electron. 14(1): 1-7 (2018) - [j32]Liuyang Zhang
A high-reliability and low-power computing-in-memory implementation within STT-MRAM. Microelectron. J. 81: 69-75 (2018) - [j31]Mario Barbareschi
A Ring Oscillator-Based Identification Mechanism Immune to Aging and External Working Conditions. IEEE Trans. Circuits Syst. I Regul. Pap. 65-I(2): 700-711 (2018) - [c151]Pierre-Yves Péneau
Improving the Performance of STT-MRAM LLC Through Enhanced Cache Replacement Policy. ARCS 2018: 168-180 - [c150]Manu Komalan, Oh Hyung Rock, Matthias Hartmann, Sushil Sakhare, Christian Tenllado, José Ignacio Gómez
Main memory organization trade-offs with DRAM and STT-MRAM options based on gem5-NVMain simulation frameworks. DATE 2018: 103-108 - [c149]Mehdi Baradaran Tahoori, Sarath Mohanachandran Nair, Rajendra Bishnoi, Sophiane Senni, Jad Mohdad, Frédérick Mailly, Lionel Torres, Pascal Benoit, Abdoulaye Gamatié, Pascal Nouet, Frederic Ouattara, Gilles Sassatelli, Kotb Jabeur, Pierre Vanhauwaert, A. Atitoaie, I. Firastrau, Gregory di Pendina, Guillaume Prenat:
Using multifunctional standardized stack as universal spintronic technology for IoT. DATE 2018: 931-936 - [c148]Peter Rouget, Benoît Badrignans, Pascal Benoit, Lionel Torres:
FPGA Implementation of Pattern Matching for Industrial Control Systems. IPDPS Workshops 2018: 210-213 - [c147]Liuyang Zhang, Wang Kang, Hao Cai, Peng Ouyang, Lionel Torres, Youguang Zhang, Aida Todri-Sanial
A Robust Dual Reference Computing-in-Memory Implementation and Design Space Exploration Within STT-MRAM. ISVLSI 2018: 275-280 - [c146]Guillaume Patrigeon
FPGA-Based Platform for Fast Accurate Evaluation of Ultra Low Power SoC. PATMOS 2018: 123-128 - [c145]Sophiane Senni, Frederic Ouattara, Jad Mohdad, Kaan Sevin, Guillaume Patrigeon, Pascal Benoit, Pascal Nouet, Lionel Torres, François Duhem, Gregory di Pendina, Guillaume Prenat:
From Spintronic Devices to Hybrid CMOS/Magnetic System On Chip. VLSI-SoC 2018: 188-191 - 2017
- [j30]Mohamad Najem, Mohamad El Ahmad, Pascal Benoit, Gilles Sassatelli, Lionel Torres:
Fine-grained monitoring for self-aware embedded systems. Microprocess. Microsystems 48: 3-10 (2017) - [j29]Maha Kooli, Firas Kaddachi, Giorgio Di Natale, Alberto Bosio, Pascal Benoit, Lionel Torres:
Computing reliability: On the differences between software testing and software fault injection techniques. Microprocess. Microsystems 50: 102-112 (2017) - [j28]Mohamad Najem
A Design-Time Method for Building Cost-Effective Run-Time Power Monitoring. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 36(7): 1153-1166 (2017) - [c144]Sophiane Senni, Thibaud Delobelle, Odilia Coi, Pierre-Yves Peneau
Embedded systems to high performance computing using STT-MRAM. DATE 2017: 536-541 - [c143]Mehdi Baradaran Tahoori, Sarath Mohanachandran Nair, Rajendra Bishnoi, Sophiane Senni, Jad Mohdad, Frédérick Mailly, Lionel Torres, Pascal Benoit, Pascal Nouet, Rui Ma, Martin Kreißig, Frank Ellinger, Kotb Jabeur, Pierre Vanhauwaert, Gregory di Pendina, Guillaume Prenat:
GREAT: HeteroGeneous IntegRated Magnetic tEchnology Using Multifunctional Standardized sTack. ISVLSI 2017: 344-349 - [c142]Odilia Coi, Guillaume Patrigeon
A novel SRAM - STT-MRAM hybrid cache implementation improving cache performance. NANOARCH 2017: 39-44 - [c141]Peter Rouget, Benoît Badrignans, Pascal Benoit, Lionel Torres:
SecBoot - lightweight secure boot mechanism for Linux-based embedded systems on FPGAs. ReCoSoC 2017: 1-5 - 2016
- [j27]Sophiane Senni, Lionel Torres, Gilles Sassatelli, Abdoulaye Gamatié, Bruno Mussard:
Exploring MRAM Technologies for Energy Efficient Systems-On-Chip. IEEE J. Emerg. Sel. Topics Circuits Syst. 6(3): 279-292 (2016) - [j26]Elena-Ioana Vatajelu
STT-MRAM-Based PUF Architecture Exploiting Magnetic Tunnel Junction Fabrication-Induced Variability. ACM J. Emerg. Technol. Comput. Syst. 13(1): 5:1-5:21 (2016) - [j25]Sophiane Senni, Lionel Torres, Gilles Sassatelli, Abdoulaye Gamatié:
Non-Volatile Processor Based on MRAM for Ultra-Low-Power IoT Devices. ACM J. Emerg. Technol. Comput. Syst. 13(2): 17:1-17:23 (2016) - [j24]Mario Barbareschi
Ring oscillators analysis for security purposes in Spartan-6 FPGAs. Microprocess. Microsystems 47: 3-10 (2016) - [j23]Florent Bruguier
Cost-Effective Design Strategies for Securing Embedded Processors. IEEE Trans. Emerg. Top. Comput. 4(1): 60-72 (2016) - [c140]Florent Bruguier
Hardware security: From concept to application. EWME 2016: 1-6 - [c139]Liuyang Zhang, Aida Todri-Sanial
Quantitative evaluation of reliability and performance for STT-MRAM. ISCAS 2016: 1150-1153 - [c138]Anastasiia Butko, Florent Bruguier
Full-System Simulation of big.LITTLE Multicore Architecture for Performance and Energy Exploration. MCSoC 2016: 201-208 - [c137]Pierre-Yves Peneau
Loop optimization in presence of STT-MRAM caches: A study of performance-energy tradeoffs. PATMOS 2016: 162-169 - 2015
- [j22]Guilherme Perin, Laurent Imbert, Philippe Maurine, Lionel Torres:
Vertical and horizontal correlation attacks on RNS-based exponentiations. J. Cryptogr. Eng. 5(3): 171-185 (2015) - [j21]Lilian Bossuet, Viktor Fischer, Lubos Gaspar, Lionel Torres, Guy Gogniat
Disposable configuration of remotely reconfigurable systems. Microprocess. Microsystems 39(6): 382-392 (2015) - [c136]Sophiane Senni, Raphael Martins Brum, Lionel Torres, Gilles Sassatelli, Abdoulaye Gamatié, Bruno Mussard:
Potential applications based on NVM emerging technologies. DATE 2015: 1012-1017 - [c135]Maha Kooli, Alberto Bosio, Pascal Benoit, Lionel Torres:
Software testing and software fault injection. DTIS 2015: 1-6 - [c134]Jérôme Rampon, Renaud Perillat, Lionel Torres, Pascal Benoit, Giorgio Di Natale, Mario Barbareschi
Digital Right Management for IP Protection. ISVLSI 2015: 200-203 - [c133]Jeremy Lopes, Gregory di Pendina
Radiative Effects on MRAM-Based Non-Volatile Elementary Structures. ISVLSI 2015: 321-326 - [c132]Jérémie Clément, Bruno Mussard, David Naccache, Lionel Torres:
Implementation of AES Using NVM Memories Based on Comparison Function. ISVLSI 2015: 356-361 - [c131]Sophiane Senni, Lionel Torres, Gilles Sassatelli, Abdoulaye Gamatié, Bruno Mussard:
Emerging Non-volatile Memory Technologies Exploration Flow for Processor Architecture. ISVLSI 2015: 460 - [c130]Elena-Ioana Vatajelu
STT-MRAM-Based Strong PUF Architecture. ISVLSI 2015: 467-472 - [c129]Anastasiia Butko, Abdoulaye Gamatié, Gilles Sassatelli, Lionel Torres, Michel Robert
Design Exploration for next Generation High-Performance Manycore On-chip Systems: Application to big.LITTLE Architectures. ISVLSI 2015: 551-556 - [c128]Bi Wu
An architecture-level cache simulation framework supporting advanced PMA STT-MRAM. NANOARCH 2015: 7-12 - [c127]Mohamad El Ahmad, Mohamad Najem, Pascal Benoit, Gilles Sassatelli, Lionel Torres:
Adaptive Power monitoring for self-aware embedded systems. NORCAS 2015: 1-4 - [c126]Rémy Druyer, Lionel Torres, Pascal Benoit, Paul-Vincent Bonzom, Patrick Le-Quéré:
A survey on security features in modern FPGAs. ReCoSoC 2015: 1-8 - 2014
- [j20]Fernanda Lima Kastensmidt
Voltage scaling and aging effects on soft error rate in SRAM-based FPGAs. Microelectron. Reliab. 54(9-10): 2344-2348 (2014) - [c125]Guilherme Perin, Laurent Imbert, Lionel Torres, Philippe Maurine:
Attacking Randomized Exponentiations Using Unsupervised Learning. COSADE 2014: 144-160 - [c124]Yeter Akgul, Diego Puschini, Suzanne Lesecq, Edith Beigné
Power management through DVFS and dynamic body biasing in FD-SOI circuits. DAC 2014: 183:1-183:6 - [c123]Fernanda Lima Kastensmidt
Aging and voltage scaling impacts under neutron-induced soft error rate in SRAM-based FPGAs. ETS 2014: 1-2 - [c122]Abdulazim Amouri, Florent Bruguier
Aging effects in FPGAs: an experimental analysis. FPL 2014: 1-4 - [c121]Mohamad Najem, Pascal Benoit, Florent Bruguier
Method for dynamic power monitoring on FPGAs. FPL 2014: 1-6 - [c120]Sophiane Senni, Lionel Torres, Gilles Sassatelli, Anastasiia Butko, Bruno Mussard:
Exploration of Magnetic RAM Based Memory Hierarchy for Multicore Architecture. ISVLSI 2014: 248-251 - [c119]Maha Kooli, Pascal Benoit, Giorgio Di Natale, Lionel Torres, Volkmar Sieh:
Fault injection tools based on Virtual Machines. ReCoSoC 2014: 1-6 - [c118]Sophiane Senni, Lionel Torres, Gilles Sassatelli, Anastasiia Butko, Bruno Mussard:
Power efficient Thermally Assisted Switching Magnetic memory based memory systems. ReCoSoC 2014: 1-6 - 2013
- [j19]Imen Mansouri, Pascal Benoit, Lionel Torres, Fabien Clermidy:
Fine-Grain Dynamic Energy Tracking for System on Chip. IEEE Trans. Circuits Syst. II Express Briefs 60-II(6): 356-360 (2013) - [c117]Guilherme Perin, Laurent Imbert, Lionel Torres, Philippe Maurine:
Practical Analysis of RSA Countermeasures Against Side-Channel Electromagnetic Attacks. CARDIS 2013: 200-215 - [c116]Guilherme Perin, Laurent Imbert, Lionel Torres, Philippe Maurine:
Electromagnetic Analysis on RSA Algorithm Based on RNS. DSD 2013: 345-352 - [c115]Lionel Torres, Raphael Martins Brum, Luis Vitório Cargnini
Trends on the application of emerging nonvolatile memory to processors and programmable devices. ISCAS 2013: 101-104 - [c114]Jimmy Tarrillo
Using electromagnetic emanations for variability characterization in Flash-based FPGAs. ISVLSI 2013: 109-114 - [c113]Lionel Torres, Raphael Martins Brum, Yoann Guillemenet, Gilles Sassatelli, Luis Vitório Cargnini
Evaluation of hybrid MRAM/CMOS cells for reconfigurable computing. NEWCAS 2013: 1-6 - [c112]Yeter Akgul, Diego Puschini, Suzanne Lesecq, Edith Beigné
Methodology for Power Mode selection in FD-SOI circuits with DVFS and Dynamic Body Biasing. PATMOS 2013: 199-206 - 2012
- [j18]Amine Dehbaoui, Victor Lomné, Thomas Ordas, Lionel Torres, Michel Robert
Enhancing Electromagnetic Analysis Using Magnitude Squared Incoherence. IEEE Trans. Very Large Scale Integr. Syst. 20(3): 573-577 (2012) - [c111]Guilherme Perin, Lionel Torres, Pascal Benoit, Philippe Maurine:
Amplitude demodulation-based EM analysis of different RSA implementations. DATE 2012: 1167-1172 - [c110]Florian Devic, Lionel Torres, Jérémie Crenne, Benoît Badrignans, Pascal Benoit:
SecURe DPR: Secure update preventing replay attacks for dynamic partial reconfiguration. FPL 2012: 57-62 - [c109]Pascal Cotret, Florian Devic, Guy Gogniat
Security enhancements for FPGA-based MPSoCs: A boot-to-runtime protection flow for an embedded Linux-based system. ReCoSoC 2012: 1-8 - 2011
- [j17]Rafael Iankowski Soares, Ney Laert Vilar Calazans
A Robust Architectural Approach for Cryptographic Algorithms Using GALS Pipelines. IEEE Des. Test Comput. 28(5): 62-71 (2011) - [j16]Gabriel Marchesan Almeida, Rémi Busseuil, Luciano Ost
PI and PID Regulation Approaches for Performance-Constrained Adaptive Multiprocessor System-on-Chip. IEEE Embed. Syst. Lett. 3(3): 77-80 (2011) - [c108]Florent Bruguier
A New Process Characterization Method for FPGAs Based on Electromagnetic Analysis. FPL 2011: 20-23 - [c107]Lyonel Barthe, Luis Vitório Cargnini
Optimizing an Open-Source Processor for FPGAs: A Case Study. FPL 2011: 551-556 - [c106]Lionel Torres, Weisheng Zhao:
Magnetic memory (MRAM), a new area for 2D and 3D SoC/SiP design. ACM Great Lakes Symposium on VLSI 2011: 429-430 - [c105]Weisheng Zhao, Lionel Torres, Yoann Guillemenet, Luis Vitório Cargnini
Design of MRAM based logic circuits and its applications. ACM Great Lakes Symposium on VLSI 2011: 431-436 - [c104]Christoph Roth, Gabriel Marchesan Almeida, Oliver Sander, Luciano Ost
Modular Framework for Multi-level Multi-device MPSoC Simulation. IPDPS Workshops 2011: 136-142 - [c103]Florian Devic, Lionel Torres, Benoît Badrignans:
Securing Boot of an Embedded Linux on FPGA. IPDPS Workshops 2011: 189-195 - [c102]Lyonel Barthe, Luis Vitório Cargnini
The SecretBlaze: A Configurable and Cost-Effective Open-Source Soft-Core Processor. IPDPS Workshops 2011: 310-313 - [c101]Gabriel Marchesan Almeida, Rémi Busseuil, Everton Alceu Carara, Nicolas Hebert, Sameer Varyani, Gilles Sassatelli, Pascal Benoit, Lionel Torres, Fernando Gehm Moraes
Predictive Dynamic Frequency Scaling for Multi-Processor Systems-on-Chip. ISCAS 2011: 1500-1503 - [c100]Nicolas Hebert, Gabriel Marchesan Almeida, Pascal Benoit, Gilles Sassatelli, Lionel Torres:
Evaluation of a distributed fault handler method for MPSoC. ISCAS 2011: 2329-2332 - [c99]Gregory di Pendina
Ultra Compact Non-volatile Flip-Flop for Low Power Digital Circuits Based on Hybrid CMOS/Magnetic Technology. PATMOS 2011: 83-91 - [c98]Rémi Busseuil, Lyonel Barthe, Gabriel Marchesan Almeida, Luciano Ost
Open-Scale: A Scalable, Open-Source NOC-based MPSoC for Design Space Exploration. ReConFig 2011: 357-362 - [c97]Weisheng Zhao, Lionel Torres, Luis Vitório Cargnini
High Performance SoC Design Using Magnetic Logic and Memory. VLSI-SoC (Selected Papers) 2011: 10-33 - [c96]Weisheng Zhao, Yue Zhang, Yahya Lakys
Embedded MRAM for high-speed computing. VLSI-SoC 2011: 37-42 - [p1]Lionel Torres, Pascal Benoit, Gilles Sassatelli, Michel Robert, Fabien Clermidy, Diego Puschini:
An Introduction to Multi-Core System on Chip - Trends and Challenges. Multiprocessor System-on-Chip 2011: 1-21 - 2010
- [j15]Yoann Guillemenet, Lionel Torres, Gilles Sassatelli:
Non-volatile run-time field-programmable gate arrays structures using thermally assisted switching magnetic random access memories. IET Comput. Digit. Tech. 4(3): 211-226 (2010) - [j14]Pascal Benoit, Lionel Torres, Gilles Sassatelli, Michel Robert
Run-time mapping for dynamic reconfiguration management in embedded systems. Int. J. Embed. Syst. 4(3/4): 276-291 (2010) - [j13]Lionel Torres, Viktor K. Prasanna:
Selected Papers from ReconFig 2009 International Conference on Reconfigurable Computing and FPGAs (ReconFig 2009). Int. J. Reconfigurable Comput. 2010: 679484:1-679484:2 (2010) - [j12]Imen Mansouri, Pascal Benoit, Diego Puschini, Lionel Torres, Fabien Clermidy, Gilles Sassatelli:
Dynamic Energy Optimization in Network-on-Chip-Based System-on-Chips. J. Low Power Electron. 6(4): 564-577 (2010) - [j11]Reouven Elbaz, Lionel Torres, Gilles Sassatelli, Pierre Guillemin, Michel Bardouillet, Albert Martinez:
Block-Level Added Redundancy Explicit Authentication for Parallelized Encryption and Integrity Checking of Processor-Memory Transactions. Trans. Comput. Sci. 10: 231-260 (2010) - [j10]Benoît Badrignans, David Champagne, Reouven Elbaz, Catherine H. Gebotys, Lionel Torres:
SARFUM: Security Architecture for Remote FPGA Update and Monitoring. ACM Trans. Reconfigurable Technol. Syst. 3(2): 8:1-8:29 (2010) - [c95]Nicolas Hebert, Pascal Benoit, Gilles Sassatelli, Lionel Torres:
D-Scale: A Scalable System-Level Dependable Method for MPSoCs. Asian Test Symposium 2010: 198-205 - [c94]Jerome Di-Battista, Jean-Christophe Courrège, Bruno Rouzeyre, Lionel Torres, Philippe Perdu:
When Failure Analysis Meets Side-Channel Attacks. CHES 2010: 188-202 - [c93]Etienne Faure, Gabriel Marchesan Almeida, Mounir Benabdenbi, Pascal Benoit, Fabien Clermidy, François Pêcheux, Gilles Sassatelli, Lionel Torres:
An in-memory monitoring database for self adaptive MP2SoCs. DASIP 2010: 97-104 - [c92]Camille Jalier, Didier Lattard, Ahmed Amine Jerraya, Gilles Sassatelli, Pascal Benoit, Lionel Torres:
Heterogeneous vs homogeneous MPSoC approaches for a Mobile LTE modem. DATE 2010: 184-189 - [c91]Victor Lomné, Amine Dehbaoui, Philippe Maurine, Lionel Torres, Michel Robert
Differential Power Analysis enhancement with statistical preprocessing. DATE 2010: 1301-1304 - [c90]Lionel Torres, Yoann Guillemenet, Syed Zahid Ahmed:
A Dynamic Reconfigurable MRAM based FPGA. ERSA 2010: 31-40 - [c89]Lyonel Barthe, Pascal Benoit, Lionel Torres:
Investigation of a Masking Countermeasure against Side-Channel Attacks for RISC-based Processor Architectures. FPL 2010: 139-144 - [c88]Florian Devic, Lionel Torres, Benoît Badrignans:
Secure Protocol Implementation for Remote Bitstream Update Preventing Replay Attacks on FPGA. FPL 2010: 179-182 - [c87]Syed Zahid Ahmed, Gilles Sassatelli, Lionel Torres, Laurent Rouge:
Survey of New Trends in Industry for Programmable Hardware: FPGAs, MPPAs, MPSoCs, Structured ASICs, eFPGAs and New Wave of Innovation in FPGAs. FPL 2010: 291-297 - [c86]Camille Jalier, Didier Lattard, Gilles Sassatelli, Pascal Benoit, Lionel Torres:
Flexible and distributed real-time control on a 4G telecom MPSoC. ISCAS 2010: 3961-3964 - [c85]Camille Jalier, Didier Lattard, Gilles Sassatelli, Pascal Benoit, Lionel Torres:
A Homogeneous MPSoC with Dynamic Task Mapping for Software Defined Radio. ISVLSI 2010: 345-350 - [c84]Imen Mansouri, Camille Jalier, Fabien Clermidy, Pascal Benoit, Lionel Torres:
Implementation Analysis of a Dynamic Energy Management Approach Inspired by Game-Theory. ISVLSI 2010: 422-427 - [c83]Victor Lomné, Philippe Maurine, Lionel Torres, Thomas Ordas, Mathieu Lisart, Jérome Toublanc:
Modeling Time Domain Magnetic Emissions of ICs. PATMOS 2010: 238-249 - [c82]Luis Vitório Cargnini
Improving the Reliability of a FPGA Using Fault-Tolerance Mechanism Based on Magnetic Memory (MRAM). ReConFig 2010: 150-155 - [c81]Nicolas Hebert, Gabriel Marchesan Almeida, Pascal Benoit, Gilles Sassatelli, Lionel Torres:
A Cost-Effective Solution to Increase System Reliability and Maintain Global Performance under Unreliable Silicon in MPSoC. ReConFig 2010: 346-351 - [c80]Gabriel Marchesan Almeida, Sameer Varyani, Rémi Busseuil, Nicolas Hebert, Gilles Sassatelli, Pascal Benoit, Lionel Torres, Michel Robert:
Providing Better Multi-processor Systems-on-Chip Resources Utilization by Means of Using a Control-Loop Feedback Mechanism. ReConFig 2010: 382-387 - [c79]Florent Bruguier, Pascal Benoit, Lionel Torres:
Investigation of Digital Sensors for Variability Characterization on FPGAs. ReCoSoC 2010: 95-100 - [c78]Gabriel Marchesan Almeida, Sameer Varyani, Rémi Busseuil, Gilles Sassatelli, Pascal Benoit, Lionel Torres, Everton Carara, Fernando Gehm Moraes
Evaluating the impact of task migration in multi-processor systems-on-chip. SBCCI 2010: 73-78 - [c77]Rafael Soares, Ney Laert Vilar Calazans
A GALS pipeline DES architecture to increase robustness against DPA and DEMA attacks. SBCCI 2010: 115-120 - [c76]Imen Mansouri, Fabien Clermidy, Pascal Benoit, Lionel Torres:
A run-time distributed cooperative approach to optimize power consumption in MPSoCs. SoCC 2010: 25-30 - [c75]François Poucheret, Lyonel Barthe, Pascal Benoit, Lionel Torres, Philippe Maurine, Michel Robert:
Spatial EM jamming: A countermeasure against EM Analysis? VLSI-SoC 2010: 105-110
2000 – 2009
- 2009
- [j9]Gabriel Marchesan Almeida, Gilles Sassatelli, Pascal Benoit, Nicolas Saint-Jean, Sameer Varyani, Lionel Torres, Michel Robert
An Adaptive Message Passing MPSoC Framework. Int. J. Reconfigurable Comput. 2009: 242981:1-242981:20 (2009) - [j8]Lionel Torres, César Torres:
Selected Papers from ReConFig 2008. Int. J. Reconfigurable Comput. 2009: 869329:1-869329:2 (2009) - [j7]Reouven Elbaz, David Champagne, Catherine H. Gebotys, Ruby B. Lee, Nachiketh R. Potlapally, Lionel Torres:
Hardware Mechanisms for Memory Authentication: A Survey of Existing Techniques and Engines. Trans. Comput. Sci. 4: 1-22 (2009) - [c74]Syed Zahid Ahmed, Julien Eydoux, Laurent Rouge, Jean-Baptiste Cuelle, Gilles Sassatelli, Lionel Torres:
Exploration of power reduction and performance enhancement in LEON3 processor with ESL reprogrammable eFPGA in processor pipeline and as a co-processor. DATE 2009: 184-189 - [c73]Victor Lomné, Philippe Maurine, Lionel Torres, Michel Robert
Evaluation on FPGA of triple rail logic robustness against DPA and DEMA. DATE 2009: 634-639 - [c72]Diego Puschini, Fabien Clermidy, Pascal Benoit, Gilles Sassatelli, Lionel Torres:
Dynamic and distributed frequency assignment for energy and latency constrained MP-SoC. DATE 2009: 1564-1567 - [c71]Yoann Guillemenet, Syed Zahid Ahmed, Lionel Torres, Alexandre Martheley, Julien Eydoux, Jean-Baptiste Cuelle, Laurent Rouge, Gilles Sassatelli:
MRAM Based eFPGAs: Programming and Silicon Flows, Exploration Environments, MRAM Current State in Industry and Its Unique Potentials for FPGAs. ReConFig 2009: 18-23 - [c70]Diego Puschini, Fabien Clermidy, Pascal Benoit, Gilles Sassatelli, Lionel Torres:
Adaptive energy-aware latency-constrained DVFS policy for MPSoC. SoCC 2009: 89-92 - [c69]Amine Dehbaoui, Victor Lomné, Philippe Maurine, Lionel Torres, Michel Robert:
Enhancing Electromagnetic Attacks Using Spectral Coherence Based Cartography. VLSI-SoC 2009: 135-155 - [e3]Viktor K. Prasanna, Lionel Torres, René Cumplido:
ReConFig'09: 2009 International Conference on Reconfigurable Computing and FPGAs, Cancun, Quintana Roo, Mexico, 9-11 December 2009, Proceedings. IEEE Computer Society 2009, ISBN 978-0-7695-3917-1 [contents] - 2008
- [j6]Diego Puschini
A Game-Theoretic Approach for Run-Time Distributed Optimization on MP-SoC. Int. J. Reconfigurable Comput. 2008: 403086:1-403086:11 (2008) - [j5]Yoann Guillemenet, Lionel Torres, Gilles Sassatelli, Nicolas Bruchon:
On the Use of Magnetic RAMs in Field-Programmable Gate Arrays. Int. J. Reconfigurable Comput. 2008: 723950:1-723950:9 (2008) - [j4]Jürgen Becker, Michael Hübner, Roger F. Woods, Philip Heng Wai Leong, Robert Esser, Lionel Torres:
Current Trends on Reconfigurable Computing. Int. J. Reconfigurable Comput. 2008: 918525:1 (2008) - [c68]Benoît Godard, Jean Michel Daga, Lionel Torres, Gilles Sassatelli:
Hierarchical Code Correction and Reliability Management in Embedded nor Flash Memories. ETS 2008: 84-90 - [c67]Benoît Badrignans, Reouven Elbaz, Lionel Torres:
Secure FPGA configuration architecture preventing system downgrade. FPL 2008: 317-322 - [c66]Yoann Guillemenet, Lionel Torres, Gilles Sassatelli, Nicolas Bruchon, Ilham Hassoune:
A non-volatile run-time FPGA using thermally assisted switching MRAMS. FPL 2008: 421-426 - [c65]Diego Puschini, Fabien Clermidy, Pascal Benoit, Gilles Sassatelli, Lionel Torres:
Convergence analysis of run-time distributed optimization on adaptive systems using game theory. FPL 2008: 555-558 - [c64]Nicolas Saint-Jean, Gilles Sassatelli, Pascal Benoit, Lionel Torres, Michel Robert:
Bio-inspiration helps computers: A new machine. FPL 2008: 697-698 - [c63]Nicolas Saint-Jean, Pascal Benoit, Gilles Sassatelli, Lionel Torres, Michel Robert:
MPI-Based Adaptive Task Migration Support on the HS-Scale System. ISVLSI 2008: 105-110 - [c62]Diego Puschini, Fabien Clermidy, Pascal Benoit, Gilles Sassatelli, Lionel Torres:
Temperature-Aware Distributed Run-Time Optimization on MP-SoC Using Game Theory. ISVLSI 2008: 375-380 - [c61]Thomas Ordas, Mathieu Lisart, Etienne Sicard, Philippe Maurine, Lionel Torres:
Near-Field Mapping System to Scan in Time Domain the Magnetic Emissions of Integrated Circuits. PATMOS 2008: 229-236 - [c60]Diego Puschini, Fabien Clermidy, Pascal Benoit, Gilles Sassatelli, Lionel Torres:
Game-Theoretic Approach for Temperature-Aware Frequency Assignment with Task Synchronization on MP-SoC. ReConFig 2008: 235-240 - [c59]Syed Zahid Ahmed, Julien Eydoux, Michael Fernández, Laurent Rouge, Gilles Sassatelli, Lionel Torres:
Power Consumption Reduction Explorations in Processors by Enhancing Performance Using Small ESL Reprogrammable eFPGAs. ReConFig 2008: 313-318 - [c58]Victor Lomné, Thomas Ordas, Philippe Maurine, Lionel Torres, Michel Robert, Rafael Soares, Ney Calazans
Triple Rail Logic Robustness against DPA. ReConFig 2008: 415-420 - [c57]David Champagne, Reouven Elbaz, Catherine H. Gebotys, Lionel Torres, Ruby B. Lee:
Forward-Secure Content Distribution to Reconfigurable Hardware. ReConFig 2008: 450-455 - [c56]Rafael Soares, Ney Laert Vilar Calazans
Evaluating the robustness of secure triple track logic through prototyping. SBCCI 2008: 193-198 - [c55]Benoît Badrignans, Reouven Elbaz, Lionel Torres:
Secure update Mechanism for Remote Update of FPGA-Based System. SIES 2008: 221-224 - 2007
- [c54]Reouven Elbaz, David Champagne, Ruby B. Lee, Lionel Torres, Gilles Sassatelli, Pierre Guillemin:
TEC-Tree: A Low-Cost, Parallelizable Tree for Efficient Defense Against Memory Replay Attacks. CHES 2007: 289-302 - [c53]Benoît Godard, Jean Michel Daga, Lionel Torres, Gilles Sassatelli:
Evaluation of design for reliability techniques in embedded flash memories. DATE 2007: 1593-1598 - [c52]Benoît Godard, Jean Michel Daga, Lionel Torres, Gilles Sassatelli:
Architecture for Highly Reliable Embedded Flash Memories. DDECS 2007: 75-80 - [c51]Gilles Sassatelli, Nicolas Saint-Jean, Pascal Benoit, Lionel Torres, Michel Robert, Cristiane R. Woszezenki, Ismael Grehs, Fernando Gehm Moraes
Run-time mapping and communication strategies for Homogeneous NoC-Based MPSoCs. FCCM 2007: 295-296 - [c50]Daniel Mesquita, Benoît Badrignans, Lionel Torres, Gilles Sassatelli, Michel Robert, Fernando Moraes
A Cryptographic Coarse Grain Reconfigurable Architecture Robust Against DPA. IPDPS 2007: 1-8 - [c49]Nicolas Saint-Jean, Gilles Sassatelli, Pascal Benoit, Lionel Torres, Michel Robert:
HS-Scale: a Hardware-Software Scalable MP-SOC Architecture for embedded Systems. ISVLSI 2007: 21-28 - [c48]Nicolas Bruchon, Lionel Torres, Gilles Sassatelli, Gaston Cambon:
Technological hybridization for efficient runtime reconfigurable FPGAs. ISVLSI 2007: 29-34 - [c47]Nicolas Saint-Jean, Camille Jalier, Gilles Sassatelli, Pascal Benoit, Lionel Torres, Michel Robert:
HS Scale: A run-time adaptable MP-SoC architecture. ReCoSoC 2007: 39-46 - [c46]Eduardo Braulio Wanderley Netto, Reouven Elbaz, Lionel Torres, Gilles Sassatelli, Romain Vaslin, Guy Gogniat, Jean-Philippe Diguet:
IBC-EI: An Instruction Based Compression method with Encryption and Integrity Checking. ReCoSoC 2007: 138-145 - [c45]Nicolas Saint-Jean, Pascal Benoit, Gilles Sassatelli, Lionel Torres, Michel Robert
Application Case Studies on HS-Scale, a MP-SOC for Embbeded Systems. ICSAMOS 2007: 88-95 - [i1]Reouven Elbaz, Lionel Torres, Gilles Sassatelli, Pierre Guillemin, C. Anguille, Michel Bardouillet, Christian Buatois, Jean-Baptiste Rigaud:
Hardware Engines for Bus Encryption: A Survey of Existing Techniques. CoRR abs/0710.4803 (2007) - 2006
- [c44]Alex Ngouanga, Gilles Sassatelli, Lionel Torres, Thierry Gil, André Borin Suarez, Altamiro Amadeu Susin:
Run-Time Resources Management on Coarse Grained, Packet-Switching Reconfigurable Architecture: A Case Study Through the APACHES' Platform. ARC 2006: 134-145 - [c43]Reouven Elbaz, Lionel Torres, Gilles Sassatelli, Pierre Guillemin, Michel Bardouillet, Albert Martinez:
A parallelized way to provide data encryption and integrity checking on a processor-memory bus. DAC 2006: 506-509 - [c42]Alex Ngouanga, Gilles Sassatelli, Lionel Torres, André Borin Soares, Altamiro Amadeu Susin:
A Contextual Resources use: a Proof of Concept through the APACHES' Platform. DDECS 2006: 44-49 - [c41]Reouven Elbaz, Lionel Torres, Gilles Sassatelli, Pierre Guillemin, Michel Bardouillet:
PE-ICE: Parallelized Encryption and Integrity Checking Engine. DDECS 2006: 143-144 - [c40]Nicolas Bruchon, Lionel Torres, Gilles Sassatelli, Gaston Cambon:
Magnetic tunnelling junction based FPGA. FPGA 2006: 123-130 - [c39]Daniel Mesquita, Benoît Badrignans, Lionel Torres, Gilles Sassatelli, Michel Robert
A Leak Resistant Architecture Against Side Channel Attacks. FPL 2006: 1-4 - [c38]Nicolas Valette, Lionel Torres, Gilles Sassatelli, Frédéric Bancel:
Securing embedded programmable gate arrays in secure circuits. IPDPS 2006 - [c37]Daniel Mesquita, Benoît Badrignans, Lionel Torres, Gilles Sassatelli, Michel Robert, Fernando Gehm Moraes
A Leak Resistant SoC to Counteract Side Channel Attacks. SoC 2006: 1-4 - [c36]Pascal Benoit, Lionel Torres, Gilles Sassatelli, Michel Robert, Gaston Cambon, Jürgen Becker:
Dynamic Hardware Multiplexing: Improving Adaptability with a Run Time Reconfiguration Manager. ISVLSI 2006: 251-256 - [c35]Nicolas Bruchon, Lionel Torres, Gilles Sassatelli, Gaston Cambon:
New non-volatile FPGA concept using Magnetic Tunneling Junction. ISVLSI 2006: 269-276 - [c34]Reouven Elbaz, Lionel Torres, Gilles Sassatelli, Pierre Guillemin, Michel Bardouillet, Albert Martinez:
A Comparison of Two Approaches Providing Data Encryption and Authentication on a Processor Memory Bus. PATMOS 2006: 267-279 - [c33]Nicolas Valette, Lionel Torres, Gilles Sassatelli, S. Bancel:
How to Secure Embedded Programmable Gate Arrays? ReCoSoC 2006: 52-59 - [c32]Reouven Elbaz, Lionel Torres, Gilles Sassatelli, Pierre Guillemin, Michel Bardouillet, Albert Martinez:
Efficient Combination of Data Encryption and Integrity Checking for Embedded Systems. ReCoSoC 2006: 69-75 - [c31]Nicolas Bruchon, Lionel Torres, Gilles Sassatelli, Gaston Cambon:
Remanent SRAM Structure for Runtime Reconfigurable FPGA. ReCoSoC 2006: 124-130 - [c30]Benoît Badrignans, Daniel Mesquita, Jean-Claude Bajard, Lionel Torres, Gilles Sassatelli, Michel Robert:
A Parallel and Secure Architecture for Asymmetric Cryptography. ReCoSoC 2006: 220-224 - [c29]Viktor Fischer, Lionel Torres, Daniel Mesquita:
Flexible security and its technology limits. ReCoSoC 2006: 243-248 - [e2]Gilles Sassatelli, Leandro Soares Indrusiak, Manfred Glesner, Lionel Torres:
Proceedings of the 2nd International Workshop on Reconfigurable Communication-centric Systems-on-Chip, ReCoSoC 2006, Montpellier, France, July 2006. Univ. Montpellier II 2006, ISBN 2-9517461-2-1 [contents] - 2005
- [j3]Pascal Benoit, Gilles Sassatelli, Lionel Torres, Michel Robert, Gaston Cambon, Didier Demigny:
Méthode de caractérisation des architectures d'accélérateurs flexibles pour systèmes sur puce. Tech. Sci. Informatiques 24(6): 725-755 (2005) - [c28]Reouven Elbaz, Lionel Torres, Gilles Sassatelli, Pierre Guillemin, C. Anguille, Michel Bardouillet, Christian Buatois, Jean-Baptiste Rigaud
Hardware Engines for Bus Encryption: A Survey of Existing Techniques. DATE 2005: 40-45 - [c27]Pascal Benoit, Lionel Torres, Gilles Sassatelli, Michel Robert, Gaston Cambon:
Dynamic hardware multiplexing for coarse grain reconfigurable architectures. FPGA 2005: 270 - [c26]Nicolas Bruchon, Gaston Cambon, Lionel Torres, Gilles Sassatelli:
Magnetic remanent memory structures for dynamically reconfigurable fine grain FPGA. FPL 2005: 687-690 - [c25]Pascal Benoit, Jürgen Becker, Michel Robert, Lionel Torres, Gilles Sassatelli, Gaston Cambon:
Run-Time Scheduling for Random Multi-Tasking in Reconfigurable Coprocessors. FPL 2005: 703-706 - [c24]Pascal Benoit, Lionel Torres, Gilles Sassatelli, Michel Robert, Gaston Cambon:
Automatic Task Scheduling / Loop Unrolling using Dedicated RTR Controllers in Coarse Grain Reconfigurable Architectures. IPDPS 2005 - [c23]Nicolas Bruchon, Gaston Cambon, Lionel Torres, Gilles Sassatelli:
Non-volatile SRAM-FPGA based on magnetic tunnelling junction. ReCoSoC 2005: 113-120 - [c22]Nicolas Valette, Lionel Torres, Frédéric Bancel, Nicolas Bérard:
Integration of Reconfigurable Logic on Secure Circuits. ReCoSoC 2005: 163-168 - [c21]Daniel Mesquita, Jean-Denis Techer, Lionel Torres, Gilles Sassatelli, Gaston Cambon, Michel Robert, Fernando Moraes:
A new hardware countermeasure for masking power signatures of crypto cores. ReCoSoC 2005: 169-176 - [c20]Daniel Mesquita, Jean-Denis Techer, Lionel Torres, Gilles Sassatelli, Gaston Cambon, Michel Robert, Fernando Moraes
Current mask generation: a transistor level security against DPA attacks. SBCCI 2005: 115-120 - [c19]Daniel Mesquita, Jean-Denis Techer, Lionel Torres, Michel Robert, Guy Cathébras, Gilles Sassatelli, Fernando Gehm Moraes:
Current Mask Generation: an Analog Circuit to Thwart DPA Attacks. VLSI-SoC 2005: 317-330 - [e1]Gilles Sassatelli, Manfred Glesner, Lionel Torres, Leandro Soares Indrusiak, Thomas Hollstein:
Proceedings of the 1st International Workshop on Reconfigurable Communication-centric Systems-on-Chip, ReCoSoC 2005, Montpellier, France, June 2005. Univ. Montpellier II 2005, ISBN 2-9517-4611-3 [contents] - 2004
- [j2]Solaiman Rahim, Bruno Rouzeyre, Lionel Torres:
A Flip-Flop Matching Engine to Verify Sequential Optimizations. Comput. Artif. Intell. 23(5): 437-460 (2004) - [c18]Pascal Benoit, Gilles Sassatelli, Lionel Torres, Didier Demigny, Michel Robert, Gaston Cambon:
Metrics for Digital Signal Processing Architectures Characterization: Remanence and Scalability. SAMOS 2004: 128-137 - 2003
- [c17]Pascal Benoit, Gilles Sassatelli, Lionel Torres, Michel Robert, Gaston Cambon, Didier Demigny:
A Novel Approach for Architectural Model Characterization. An Example through the Systolic Ring. FPL 2003: 722-732 - [c16]Solaiman Rahim, Bruno Rouzeyre, Lionel Torres, Jérôme Rampon:
Matching in the presence of don't cares and redundant sequential elements for sequential equivalence checking. HLDVT 2003: 129-134 - [c15]Pascal Benoit, Gilles Sassatelli, Lionel Torres, Didier Demigny, Michel Robert
Metrics for Reconfigurable Architectures Characterization: Remanence and Scalability. IPDPS 2003: 176 - [c14]Daniel Mesquita, Lionel Torres, Fernando Gehm Moraes, Gilles Sassatelli, Michel Robert:
Are coarse grain reconfigurable architectures suitable for cryptography? VLSI-SOC 2003: 276-281 - 2002
- [c13]Gilles Sassatelli, Lionel Torres, Pascal Benoit, Thierry Gil, Camille Diou
Highly Scalable Dynamically Reconfigurable Systolic Ring-Architecture for DSP Applications. DATE 2002: 553-558 - [c12]Christel-Loïc Tisse, Lionel Martin, Lionel Torres, Michel Robert:
Iris recognition system for person identification. PRIS 2002: 186-199 - 2001
- [c11]Camille Diou
An embedded core for the 2D wavelet transform. ETFA (2) 2001: 179-186 - [c10]Gilles Sassatelli, Lionel Torres, Jérôme Galy, Gaston Cambon, Camille Diou
The Systolic Ring: A Dynamically Reconfigurable Architecture for Embedded Systems. FPL 2001: 409-419 - [c9]Gilles Sassatelli, Lionel Torres, Pascal Benoit, Gaston Cambon, Michel Robert, Jérôme Galy:
Dynamically Reconfigurable Architectures for Digital Signal Processing Applications. VLSI-SOC 2001: 63-74 - [c8]Gilles Sassatelli, Gaston Cambon, Jérôme Galy, Lionel Torres:
A Dynamically Reconfigurable Architecture for Embedded Systems. IEEE International Workshop on Rapid System Prototyping 2001: 32-37 - 2000
- [c7]Camille Diou
A Wavelet Core for Video Processing. ICIP 2000: 395-398 - [c6]Rolf Fredi Molz, Paulo Martins Engel, Fernando Gehm Moraes, Lionel Torres, Michel Robert:
Design of a Classification System for Rectangular Shapes Using a Co-Design Environment. SBCCI 2000: 281-288
1990 – 1999
- 1999
- [c5]Camille Diou, Lionel Torres, Michel Robert:
Implementation of a Wavelet Transform Architecture for Image Processing. VLSI 1999: 101-112 - [c4]S. Raimbault, Gilles Sassatelli, Gamille Cambon, Michel Robert, Sébastien Pillement, Lionel Torres:
Embedded Systems Design And Verification: Reuse Oriented Prototyping Methodologies. VLSI 1999: 407-414 - [c3]Sébastien Pillement, Lionel Torres, Michel Robert, Gaston Cambon:
Fast Prototyping: A Case Study - The JPEG Compression Algorithm. IEEE International Workshop on Rapid System Prototyping 1999: 87- - 1998
- [j1]Lionel Torres, El-Bay Bourennane, Michel Robert, Michel Paindavoine:
A Recursive Digital Filter Implementation for Noisy and Blurred Images. Real Time Imaging 4(3): 181-191 (1998) - 1996
- [c2]Sébastien Pillement, Lionel Torres, Michel Robert, Gaston Cambon:
Concurrent Design of Hardware/Software Dedicated Systems. FPL 1996: 410-414 - 1994
- [c1]Michel Robert, Lionel Torres, Fernando Moraes
Influence of Locig Block Layout Architecture on FPGA Performance. FPL 1994: 34-44
Coauthor Index
[c155] [c154] [j36] [j35] [c153] [c152] [j33] [c149] [c148] [c146] [c145] [j30] [j29] [j28] [c144] [c143] [c142] [c141] [j23] [c140] [c135] [c134] [c127] [c126] [j20] [c124] [c123] [c122] [c121] [c119] [j19] [c114] [c112] [c111] [c110] [j16] [c108] [c107] [c104] [c102] [c101] [c100] [c98] [p1] [j14] [j12] [c95] [c93] [c92] [c89] [c86] [c85] [c84] [c81] [c80] [c79] [c78] [c76] [c75] [j9] [c72] [c70] [j6] [c65] [c64] [c63] [c62] [c60] [c51] [c49] [c47] [c45] [c36] [j3] [c27] [c25] [c24] [c18] [c17] [c15] [c13] [c9]
[j33] [c151] [c149] [j30] [j28] [c144] [j27] [j25] [c138] [c137] [c136] [c131] [c129] [c127] [c121] [c120] [c118] [c115] [c113] [j16] [c105] [c104] [c101] [c100] [c98] [c97] [c96] [p1] [j15] [j14] [j12] [j11] [c95] [c93] [c92] [c87] [c86] [c85] [c82] [c81] [c80] [c78] [j9] [c74] [c72] [c71] [c70] [j6] [j5] [c68] [c66] [c65] [c64] [c63] [c62] [c60] [c59] [c54] [c53] [c52] [c51] [c50] [c49] [c48] [c47] [c46] [c45] [i1] [c44] [c43] [c42] [c41] [c40] [c39] [c38] [c37] [c36] [c35] [c34] [c33] [c32] [c31] [c30] [e2] [j3] [c28] [c27] [c26] [c25] [c24] [c23] [c21] [c20] [c19] [e1] [c18] [c17] [c15] [c14] [c13] [c10] [c9] [c8] [c4]
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