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Santiago Sánchez-Solano
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2020 – today
- 2024
- [j30]Santiago Sánchez-Solano
, Luis F. Rojas-Muñoz
Hardware-Efficient Configurable Ring-Oscillator-Based Physical Unclonable Function/True Random Number Generator Module for Secure Key Management. Sensors 24(17): 5674 (2024) - [c34]Luis F. Rojas-Muñoz
Cryptographic Security Through a Hardware Root of Trust. ARC 2024: 106-119 - 2023
- [j29]Eros Camacho-Ruiz
Timing-Attack-Resistant Acceleration of NTRU Round 3 Encryption on Resource-Constrained Embedded Systems. Cryptogr. 7(2): 29 (2023) - [j28]Luis F. Rojas-Muñoz
On-Line Evaluation and Monitoring of Security Features of an RO-Based PUF/TRNG for IoT Devices. Sensors 23(8): 4070 (2023) - [c33]Eros Camacho-Ruiz, Santiago Sánchez-Solano, Macarena C. Martínez-Rodríguez
A Simple Power Analysis of an FPGA implementation of a polynomial multiplier for the NTRU cryptosystem. DCIS 2023: 1-6 - [c32]Apurba Karmakar
HW/SW implementation of RSA digital signature on a RISC-V-based System-on-Chip. DCIS 2023: 1-6 - [c31]Eros Camacho-Ruiz, Santiago Sánchez-Solano, Macarena C. Martínez-Rodríguez
A complete SHA-3 hardware library based on a high efficiency Keccak design. NorCAS 2023: 1-7 - 2022
- [j27]Luis F. Rojas-Muñoz
Embedded system implementation of an evolutionary algorithm for circle detection on programmable devices. Comput. Electr. Eng. 99: 107714 (2022) - [j26]Macarena C. Martínez-Rodríguez
Efficient RO-PUF for Generation of Identifiers and Keys in Resource-Constrained Embedded Systems. Cryptogr. 6(4): 51 (2022) - [j25]Santiago Sánchez-Solano
Multi-Unit Serial Polynomial Multiplier to Accelerate NTRU-Based Cryptographic Schemes in IoT Embedded Systems. Sensors 22(5): 2057 (2022) - [c30]Luis F. Rojas-Muñoz, Santiago Sánchez-Solano, Macarena C. Martínez-Rodríguez
True Random Number Generator based on RO-PUF. DCIS 2022: 1-6 - 2021
- [j24]Eros Camacho-Ruiz
Timing-Optimized Hardware Implementation to Accelerate Polynomial Multiplication in the NTRU Algorithm. ACM J. Emerg. Technol. Comput. Syst. 17(3): 35:1-35:16 (2021) - [c29]Macarena C. Martínez-Rodríguez
Design Flow to Evaluate the Performance of Ring Oscillator PUFs on FPGAs. DCIS 2021: 1-6 - 2020
- [c28]Eros Camacho-Ruiz
Accelerating the Development of NTRU Algorithm on Embedded Systems. DCIS 2020: 1-6
2010 – 2019
- 2019
- [j23]Alejandro Cabrera Aldaya, Billy Bob Brumley
Memory Tampering Attack on Binary GCD Based Inversion Algorithms. Int. J. Parallel Program. 47(4): 621-640 (2019) - 2017
- [j22]Alejandro Cabrera Aldaya, Raudel Cuiman Márquez, Alejandro Cabrera Sarmiento, Santiago Sánchez-Solano
Side-channel analysis of the modular inversion step in the RSA key generation algorithm. Int. J. Circuit Theory Appl. 45(2): 199-213 (2017) - [j21]Alejandro Cabrera Aldaya, Alejandro Cabrera Sarmiento, Santiago Sánchez-Solano:
SPA vulnerabilities of the binary extended Euclidean algorithm. J. Cryptogr. Eng. 7(4): 273-285 (2017) - 2016
- [j20]Alejandro Cabrera Aldaya, Alejandro Cabrera Sarmiento, Santiago Sánchez-Solano
AES T-Box tampering attack. J. Cryptogr. Eng. 6(1): 31-48 (2016) - [j19]Elisa Calvo-Gallego
Low-cost dedicated hardware IP modules for background subtraction in embedded vision systems. J. Real Time Image Process. 12(4): 681-695 (2016) - 2015
- [c27]Elisa Calvo-Gallego, Santiago Sánchez-Solano
Hardware implementation of a background substraction algorithm in FPGA-based platforms. ICIT 2015: 1688-1693 - [c26]Javier Cerezuela-Mora, Elisa Calvo-Gallego, Santiago Sánchez-Solano
Hardware/software co-design of video processing applications on a reconfigurable platform. ICIT 2015: 1694-1699 - 2014
- [j18]Piedad Brox
Fuzzy logic-based embedded system for video de-interlacing. Appl. Soft Comput. 14: 338-346 (2014) - [j17]Piedad Brox Jiménez
Edge-adaptive spatial video de-interlacing algorithms based on fuzzy logic. IEEE Trans. Consumer Electron. 60(3): 375-383 (2014) - 2013
- [j16]Santiago Sánchez-Solano
Model-Based Design Methodology for Rapid Development of Fuzzy Controllers on FPGAs. IEEE Trans. Ind. Informatics 9(3): 1361-1370 (2013) - [j15]María Brox, Santiago Sánchez-Solano
CAD Tools for Hardware Implementation of Embedded Fuzzy Systems on FPGAs. IEEE Trans. Ind. Informatics 9(3): 1635-1644 (2013) - [c25]Elisa Calvo-Gallego
A Fuzzy System for Background Modeling in Video Sequences. WILF 2013: 184-192 - 2012
- [j14]Federico Montesino-Pouzols
Enabling fuzzy technologies in high performance networking via an open FPGA-based development platform. Appl. Soft Comput. 12(4): 1440-1450 (2012) - [c24]Francisco Jose Moreno-Velo
XFSML: An XML-based modeling language for fuzzy systems. FUZZ-IEEE 2012: 1-8 - [c23]Elisa Calvo-Gallego
Real-time FPGA connected component labeling system. ICECS 2012: 593-596 - 2011
- [j13]Julio Gutiérrez-Ríos, Piedad Brox
Fuzzy motion adaptive algorithm and its hardware implementation for video de-interlacing. Appl. Soft Comput. 11(4): 3311-3320 (2011) - [j12]Piedad Brox Jiménez
Soft Computing Techniques for Video De-Interlacing. IEEE J. Sel. Top. Signal Process. 5(2): 285-296 (2011) - [c22]María Brox, Santiago Sánchez-Solano
XFVHDL4: A hardware synthesis tool for fuzzy systems. ISDA 2011: 385-390 - 2010
- [b1]Piedad Brox Jiménez, Iluminada Baturone
Fuzzy Logic-Based Algorithms for Video De-Interlacing. Studies in Fuzziness and Soft Computing 246, Springer 2010, ISBN 978-3-642-10694-1, pp. 1-168 - [c21]Piedad Brox Jiménez
Tuning of a hierarchical fuzzy system for video de-interlacing. FUZZ-IEEE 2010: 1-6 - [c20]Santiago Sánchez-Solano, Ernesto del Toro, María Brox, Iluminada Baturone
A design environment for synthesis of embedded fuzzy controllers on FPGAs. FUZZ-IEEE 2010: 1-8 - [c19]Ernesto del Toro, Santiago Sánchez-Solano, María Brox, Alejandro J. Cabrera:
Hardware-software Codesign of Fuzzy Control Systems using FPGAs. ICINCO (1) 2010: 213-216 - [c18]Iluminada Baturone
An automated design flow from linguistic models to piecewise polynomial digital circuits. ISCAS 2010: 3317-3320
2000 – 2009
- 2009
- [j11]Piedad Brox
Fuzzy Motion-Adaptive Interpolation With Picture Repetition Detection for Deinterlacing. IEEE Trans. Instrum. Meas. 58(9): 2952-2958 (2009) - 2008
- [c17]Federico Montesino-Pouzols
Linguistic summarization of network traffic flows. FUZZ-IEEE 2008: 619-624 - 2007
- [j10]Piedad Brox
A fuzzy edge-dependent motion adaptive algorithm for de-interlacing. Fuzzy Sets Syst. 158(3): 337-347 (2007) - [j9]Francisco Jose Moreno-Velo
Automatic tuning of complex fuzzy systems with Xfuzzy. Fuzzy Sets Syst. 158(18): 2026-2038 (2007) - [j8]Francisco Jose Moreno-Velo
Erratum to "Automatic tuning of complex fuzzy systems with Xfuzzy": [Fuzzy Sets and System 158 (2007) 2026-2038]. Fuzzy Sets Syst. 158(24): 2763 (2007) - [j7]Santiago Sánchez-Solano
FPGA Implementation of Embedded Fuzzy Controllers for Robotic Applications. IEEE Trans. Ind. Electron. 54(4): 1937-1945 (2007) - [c16]Iluminada Baturone
Using Xfuzzy Environment for the Whole Design of Fuzzy Systems. FUZZ-IEEE 2007: 1-6 - 2006
- [j6]Angel Barriga
Modelling and implementation of fuzzy systems based on VHDL. Int. J. Approx. Reason. 41(2): 164-178 (2006) - [c15]María Brox, Santiago Sánchez-Solano:
Development of IP Modules of Fuzzy Controllers for the Design of Embedded Systems on FPGAs. FPL 2006: 1-2 - [c14]Federico Montesino-Pouzols
Fuzzy End-to-End Rate Control for Internet Transport Protocols. FUZZ-IEEE 2006: 1347-1354 - [c13]Piedad Brox
Fuzzy Motion Adaptive Algorithm for Video De-interlacing. KES (2) 2006: 363-370 - 2005
- [c12]Piedad Brox, Iluminada Baturone, Santiago Sánchez-Solano:
Progressive scan conversion based on edge-dependent interpolation using fuzzy logic. EUSFLAT Conf. 2005: 699-704 - [c11]Angel Barriga
Fuzzy Logic Activities at the Microelectronics Institute of Seville. WIRN/NAIS 2005: 157-162 - 2004
- [j5]Alejandro Cabrera Sarmiento, Santiago Sánchez-Solano
Hardware/software codesign of configurable fuzzy control systems. Appl. Soft Comput. 4(3): 271-285 (2004) - [j4]Iluminada Baturone
Automatic design of fuzzy controllers for car-like autonomous robots. IEEE Trans. Fuzzy Syst. 12(4): 447-465 (2004) - [c10]Francisco Jose Moreno-Velo, Iluminada Baturone
The parametric definition of membership functions in XFL3. FUZZ-IEEE 2004: 761-766 - 2003
- [c9]Francisco Jose Moreno-Velo, Iluminada Baturone
Tuning complex fuzzy systems by supervised learning algorithms. FUZZ-IEEE 2003: 226-231 - [c8]Francisco Jose Moreno-Velo, Iluminada Baturone
Rapid design of fuzzy systems with Xfuzzy. FUZZ-IEEE 2003: 342-347 - [c7]Angel Barriga, Santiago Sánchez-Solano, Piedad Brox Jiménez, Alejandro Cabrera, Iluminada Baturone
VHDL High Level Modelling and Implementation of Fuzzy Systems. WILF 2003: 11-18 - 2002
- [c6]Alejandro Cabrera, Santiago Sánchez-Solano, Raouf Senhadji, Angel Barriga, Carlos Jesús Jiménez-Fernández:
Hardware/software codesign methodology for fuzzy controller implementation. FUZZ-IEEE 2002: 464-469 - [c5]Santiago Sánchez-Solano
Prototyping of Fuzzy Logic-Based Controllers Using Standard FPGA Development Boards. IEEE International Workshop on Rapid System Prototyping 2002: 25- - 2001
- [c4]Francisco Jose Moreno-Velo, Iluminada Baturone, Santiago Sánchez-Solano, Angel Barriga:
Xfuzzy 3.0: a development environment for fuzzy systems. EUSFLAT Conf. 2001: 93-96
1990 – 1999
- 1998
- [c3]E. Lago, Carlos Jesús Jiménez-Fernández
XFVHDL: A Tool for the Synthesis of Fuzzy Logic Controllers. DATE 1998: 102-107 - [c2]Angel Barriga
A design methodology for application specific fuzzy integrated circuits. ICECS 1998: 431-434 - 1997
- [j3]Iluminada Baturone
Implementation of CMOS fuzzy controllers as mixed-signal integrated circuits. IEEE Trans. Fuzzy Syst. 5(1): 1-19 (1997) - 1996
- [j2]José L. Huertas, Santiago Sánchez-Solano
Integrated circuit implementation of fuzzy controllers. IEEE J. Solid State Circuits 31(7): 1051-1058 (1996) - 1995
- [j1]Manuel Valencia-Barrero
Modular Asynchronous Arbiter Insensitive to Metastability. IEEE Trans. Computers 44(12): 1456-1461 (1995) - [c1]D. Galán, Carlos Jesús Jiménez-Fernández, Angel Barriga, Santiago Sánchez-Solano:
VHDL package for description of fuzzy logic controllers. EURO-DAC 1995: 528-533
Coauthor Index
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last updated on 2024-10-07 21:23 CEST by the dblp team
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