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Brad Bloechel
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- affiliation: Intel Corporation, Microprocessor Research Laboratories, Hillsboro, OR, USA
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2000 – 2009
- 2005
- [j9]Sanu K. Mathew, Mark A. Anders, Brad Bloechel, Trang Nguyen, Ram K. Krishnamurthy, Shekhar Borkar:
A 4-GHz 300-mW 64-bit integer execution ALU with dual supply voltages in 90-nm CMOS. IEEE J. Solid State Circuits 40(1): 44-51 (2005) - [j8]Peter Hazucha, Gerhard Schrom, Jaehong Hahn, Bradley A. Bloechel, Paul Hack, Gregory E. Dermer, Siva G. Narendra, Donald S. Gardner
, Tanay Karnik, Vivek De, Shekhar Borkar:
A 233-MHz 80%-87% efficient four-phase DC-DC converter utilizing air-core inductors on package. IEEE J. Solid State Circuits 40(4): 838-845 (2005) - [j7]Peter Hazucha, Tanay Karnik, Bradley A. Bloechel, Colleen Parsons, David Finan, Shekhar Borkar:
Area-efficient linear regulator with ultra-fast load regulation. IEEE J. Solid State Circuits 40(4): 933-940 (2005) - [c5]Dinesh Somasekhar, Shih-Lien Lu, Bradley A. Bloechel, Greg Dermer, Konrad Lai, Sjeljar Borkar, Vivek De:
A 10Mbit, 15GBytes/sec bandwidth 1T DRAM chip with planar MOS storage capacitor in an unmodified 150nm logic process for high-density on-chip memory applications. ESSCIRC 2005: 355-358 - 2004
- [j6]Peter Hazucha, Tanay Karnik, Steven Walstra, Bradley A. Bloechel, James W. Tschanz, Jose Maiz, Krishnamurthy Soumyanath, Gregory E. Dermer, Siva G. Narendra, Vivek De, Shekhar Borkar:
Measurements and analysis of SER-tolerant latch in a 90-nm dual-VT CMOS process. IEEE J. Solid State Circuits 39(9): 1536-1543 (2004) - 2003
- [j5]Siva G. Narendra, Ali Keshavarzi, Bradley A. Bloechel, Shekhar Borkar, Vivek De:
Forward body bias for microprocessors in 130-nm technology generation and beyond. IEEE J. Solid State Circuits 38(5): 696-701 (2003) - [j4]James W. Tschanz, Siva G. Narendra, Yibin Ye, Bradley A. Bloechel, Shekhar Borkar, Vivek De:
Dynamic sleep transistor and body bias for active leakage power control of microprocessors. IEEE J. Solid State Circuits 38(11): 1838-1845 (2003) - [j3]Yatin Vasant Hoskote, Bradley A. Bloechel, Gregory E. Dermer, Vasantha Erraguntla, David Finan, Jason Howard, Dan Klowden, Siva G. Narendra, Greg Ruhl, James W. Tschanz, Sriram R. Vangal, Venkat Veeramachaneni, Howard Wilson, Jianping Xu, Nitin Borkar:
A TCP offload accelerator for 10 Gb/s Ethernet in 90-nm CMOS. IEEE J. Solid State Circuits 38(11): 1866-1875 (2003) - [c4]Peter Hazucha, Tanay Kamik, Steven Walstra, Bradley A. Bloechel, James W. Tschanz, Jose Maiz, Krishnamurthy Soumyanath, Greg Dermer, Siva G. Narendra, Vivek De, Shekhar Borkar:
Measurements and analysis of SER tolerant latch in a 90 nm dual-Vt CMOS process. CICC 2003: 617-620 - [c3]Luiz M. Franca-Neto
17GHz and 24GHz LNA designs based on extended-S-parameter with microstrip-on-die in 0.18μm logic CMOS technology. ESSCIRC 2003: 149-152 - [c2]Bartomeu Alorda, Brad Bloechel, Ali Keshavarzi, Jaume Segura:
CHARDIN: An Off-Chip Transient Current Monitor with Digital Interface for Production Testing. ITC 2003: 719-726 - 2002
- [j2]Sriram R. Vangal, Mark A. Anders, Nitin Borkar, Erik Seligman, Venkatesh Govindarajulu, Vasantha Erraguntla, Howard Wilson, Amaresh Pangal, Venkat Veeramachaneni, James W. Tschanz, Yibin Ye, Dinesh Somasekhar, Bradley A. Bloechel, Gregory E. Dermer, Ram K. Krishnamurthy, Krishnamurthy Soumyanath, Sanu Mathew, Siva G. Narendra, Mircea R. Stan
5-GHz 32-bit integer execution core in 130-nm dual-VT CMOS. IEEE J. Solid State Circuits 37(11): 1421-1432 (2002) - 2001
- [c1]Ali Keshavarzi, Sean Ma, Siva G. Narendra, Brad Bloechel, K. Mistry, Tahir Ghani, Shekhar Borkar, Vivek De:
Effectiveness of reverse body bias for leakage control in scaled dual Vt CMOS ICs. ISLPED 2001: 207-212
1990 – 1999
- 1999
- [j1]Krishnamurthy Soumyanath, Shekhar Borkar, Chunyan Zhou, Bradley A. Bloechel:
Accurate on-chip interconnect evaluation: a time-domain technique. IEEE J. Solid State Circuits 34(5): 623-631 (1999)
Coauthor Index
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