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Matthias Jung 0001
Person information
- affiliation: Technische Universität Kaiserslautern, Germany
Other persons with the same name
- Matthias Jung 0002 — Institut Eurecom, Sophia-Antipolis, France
- Matthias Jung 0003 — University of Siegen, Institute of Knowledge Based Systems and Knowledge Management, Germany
- Matthias Jung 0004
— Albert-Ludwigs-University of Freiburg, Department of Radiology, Germany
- Matthias Jung 0005 — University of Freiburg, Faculty of Medicine, Germany
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2020 – today
- 2024
- [j13]Alex Orailoglu, Marc Reichenbach, Matthias Jung:
Special Issue on SAMOS 2022. Int. J. Parallel Program. 52(1-2): 1-2 (2024) - [c55]Alexander Halbuer
The New Costs of Physical Memory Fragmentation. DIMES@SOSP 2024: 33-40 - [c54]Derek Christ
PIMSys: A Virtual Prototype for Processing in Memory. MEMSYS 2024: 26-33 - [e5]Lilia Zaourar, Daniel Chillet, Daniel Gracia Pérez, Morteza Biglari-Abhari, Réda Nouacer, Matthias Jung, Gianluca Palermo:
Proceedings of the 16th Workshop on Rapid Simulation and Performance Evaluation for Design, RAPIDO 2024, Munich, Germany, 18 January 2024. ACM 2024 [contents] - [i6]Matthias Jung, Sven O. Krumke, Christof Schroth, Elisabeth Lobe
QCEDA: Using Quantum Computers for EDA. CoRR abs/2403.12998 (2024) - 2023
- [c53]Lukas Steiner
Automatic DRAM Subsystem Configuration with irace. DroneSE/RAPIDO@HiPEAC 2023: 66-72 - [c52]Johannes Feldmann
A Precise Measurement Platform for LPDDR4 Memories. MEMSYS 2023: 17:1-17:8 - 2022
- [j12]Chirag Sudarshan
A Weighted Current Summation Based Mixed Signal DRAM-PIM Architecture for Deep Neural Network Inference. IEEE J. Emerg. Sel. Topics Circuits Syst. 12(2): 367-380 (2022) - [j11]Marc Reichenbach, Matthias Jung, Alex Orailoglu:
Guest Editorial: Special Issue on 2020 IEEE International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation (SAMOS 2020). Int. J. Parallel Program. 50(2): 187-188 (2022) - [j10]Lukas Steiner
DRAMSys4.0: An Open-Source Simulation Framework for In-depth DRAM Analyses. Int. J. Parallel Program. 50(2): 217-242 (2022) - [c51]Lukas Steiner
A Framework for Formal Verification of DRAM Controllers. MEMSYS 2022: 6:1-6:7 - [c50]Lukas Steiner
Unveiling the Real Performance of LPDDR5 Memories. MEMSYS 2022: 9:1-9:3 - [c49]Denis Uecker
Split'n'Cover: ISO 26262 Hardware Safety Analysis with SystemC. SAMOS 2022: 74-89 - [e4]Alex Orailoglu, Matthias Jung, Marc Reichenbach:
Embedded Computer Systems: Architectures, Modeling, and Simulation - 21st International Conference, SAMOS 2021, Virtual Event, July 4-8, 2021, Proceedings. Lecture Notes in Computer Science 13227, Springer 2022, ISBN 978-3-031-04579-0 [contents] - [e3]Alex Orailoglu, Marc Reichenbach, Matthias Jung:
Embedded Computer Systems: Architectures, Modeling, and Simulation - 22nd International Conference, SAMOS 2022, Samos, Greece, July 3-7, 2022, Proceedings. Lecture Notes in Computer Science 13511, Springer 2022, ISBN 978-3-031-15073-9 [contents] - [i5]Lukas Steiner, Chirag Sudarshan, Matthias Jung, Dominik Stoffel, Norbert Wehn:
A Framework for Formal Verification of DRAM Controllers. CoRR abs/2209.14021 (2022) - [i4]Lukas Steiner, Matthias Jung, Michael Huonker, Norbert Wehn:
Unveiling the Real Performance of LPDDR5 Memories. CoRR abs/2209.14756 (2022) - 2021
- [j9]Chirag Sudarshan
A Novel DRAM Architecture for Improved Bandwidth Utilization and Latency Reduction Using Dual-Page Operation. IEEE Trans. Circuits Syst. II Express Briefs 68(5): 1615-1619 (2021) - [c48]Chirag Sudarshan, Taha Soliman, Cecilia De la Parra, Christian Weis, Leonardo Ecco, Matthias Jung, Norbert Wehn, Andre Guntoro
A Novel DRAM-Based Process-in-Memory Architecture and its Implementation for CNNs. ASP-DAC 2021: 35-42 - [c47]Matthias Jung, Christian Weis, Norbert Wehn:
The Dynamic Random Access Memory Challenge in Embedded Computing Systems. A Journey of Embedded and Cyber-Physical Systems 2021: 19-36 - [c46]Lukas Steiner, Matthias Jung, Norbert Wehn:
Exploration of DDR5 with the Open-Source Simulator DRAMSys. MBMV 2021: 1-11 - [c45]L. J. Gokul Vasan, Éder F. Zulian, Christian Weis, Matthias Jung, Norbert Wehn:
Online Working Set Change Detection with Constant Complexity: The Cornerstone for Memory Management Algorithms in Scalable Systems. MEMSYS 2021: 11:1-11:16 - [c44]Lukas Steiner, Kira Kraft, Denis Uecker, Matthias Jung, Michael Huonker, Norbert Wehn:
An LPDDR4 Safety Model for Automotive Applications. MEMSYS 2021: 12:1-12:9 - [c43]Patrick Aichroth
SEC-Learn: Sensor Edge Cloud for Federated Learning - Invited Paper. SAMOS 2021: 432-448 - 2020
- [j8]Dimitrios Stathis
eBrainII: a 3 kW Realtime Custom 3D DRAM Integrated ASIC Implementation of a Biologically Plausible Model of a Human Scale Cortex. J. Signal Process. Syst. 92(11): 1323-1343 (2020) - [c42]Johannes Feldmann, Kira Kraft, Lukas Steiner, Norbert Wehn
Fast and Accurate DRAM Simulation: Can we Further Accelerate it? DATE 2020: 364-369 - [c41]Deepak M. Mathew, Felipe S. Prado, Éder F. Zulian, Christian Weis, Muhammad Mohsin Ghaffar, Matthias Jung, Norbert Wehn:
An Energy Efficient 3D-Heterogeneous Main Memory Architecture for Mobile Devices. MEMSYS 2020: 114-125 - [c40]Muhammad Mohsin Ghaffar, Chirag Sudarshan, Christian Weis, Matthias Jung, Norbert Wehn:
A Low Power In-DRAM Architecture for Quantized CNNs using Fast Winograd Convolutions. MEMSYS 2020: 158-168 - [c39]Marco V. Natale, Matthias Jung, Kira Kraft, Frederik Lauer
Efficient Generation of Application Specific Memory Controllers. MEMSYS 2020: 233-247 - [c38]Éder F. Zulian, Germain Haugou, Christian Weis, Matthias Jung, Norbert Wehn:
System simulation with PULP virtual platform and SystemC. RAPIDO 2020: 2:1-2:7 - [c37]Lukas Steiner, Matthias Jung, Felipe S. Prado, Kirill Bykov, Norbert Wehn
DRAMSys4.0: A Fast and Cycle-Accurate SystemC/TLM-Based DRAM Simulator. SAMOS 2020: 110-126 - [e2]Alex Orailoglu, Matthias Jung, Marc Reichenbach:
Embedded Computer Systems: Architectures, Modeling, and Simulation - 20th International Conference, SAMOS 2020, Samos, Greece, July 5-9, 2020, Proceedings. Lecture Notes in Computer Science 12471, Springer 2020, ISBN 978-3-030-60938-2 [contents] - [i3]Jason Lowe-Power, Abdul Mutaal Ahmad, Ayaz Akram, Mohammad Alian
The gem5 Simulator: Version 20.0+. CoRR abs/2007.03152 (2020)
2010 – 2019
- 2019
- [c36]Matthias Jung, Frank Schnicke, Markus Damm, Thomas Kuhn, Norbert Wehn
Speculative Temporal Decoupling Using fork(). DATE 2019: 1721-1726 - [c35]Jasmin Jahic, Varun Kumar, Matthias Jung, Gerhard Wirrer, Norbert Wehn
Rapid Identification of Shared Memory in Multithreaded Embedded Systems with Static Scheduling. ICPP Workshops 2019: 15:1-15:8 - [c34]Chirag Sudarshan, Jan Lappas, Muhammad Mohsin Ghaffar, Vladimir Rybalkin, Christian Weis, Matthias Jung, Norbert Wehn
An In-DRAM Neural Network Processing Engine. ISCAS 2019: 1-5 - [c33]Matthias Jung, Kira Kraft, Taha Soliman, Chirag Sudarshan, Christian Weis, Norbert Wehn
Fast validation of DRAM protocols with timed petri nets. MEMSYS 2019: 133-147 - [c32]Deepak M. Mathew, André Lucas Chinazzo, Christian Weis, Matthias Jung, Bastien Giraud, Pascal Vivet
RRAMSpec: A Design Space Exploration Framework for High Density Resistive RAM. SAMOS 2019: 34-47 - [c31]Chirag Sudarshan, Jan Lappas, Christian Weis, Deepak M. Mathew, Matthias Jung, Norbert Wehn
A Lean, Low Power, Low Latency DRAM Memory Controller for Transprecision Computing. SAMOS 2019: 429-441 - [e1]Dionisios N. Pnevmatikatos, Maxime Pelcat, Matthias Jung:
Embedded Computer Systems: Architectures, Modeling, and Simulation - 19th International Conference, SAMOS 2019, Samos, Greece, July 7-11, 2019, Proceedings. Lecture Notes in Computer Science 11733, Springer 2019, ISBN 978-3-030-27561-7 [contents] - [i2]Dimitrios Stathis, Chirag Sudarshan, Yu Yang, Matthias Jung, Syed Mohammad Asad Hassan Jafri, Christian Weis, Ahmed Hemani, Anders Lansner, Norbert Wehn:
eBrainII: A 3 kW Realtime Custom 3D DRAM integrated ASIC implementation of a Biologically Plausible Model of a Human Scale Cortex. CoRR abs/1911.00889 (2019) - 2018
- [j7]Christian Brugger, Valentin Grigorovici, Matthias Jung
A Memory Centric Architecture of the Link Assessment Algorithm in Large Graphs. IEEE Des. Test 35(1): 7-15 (2018) - [c30]Deepak M. Mathew, Martin Schultheis, Carl Christian Rheinländer, Chirag Sudarshan, Christian Weis, Norbert Wehn
An analysis on retention error behavior and power consumption of recent DDR4 DRAMs. DATE 2018: 293-296 - [c29]Kira Kraft, Chirag Sudarshan, Deepak M. Mathew, Christian Weis, Norbert Wehn
Improving the error behavior of DRAM by exploiting its Z-channel property. DATE 2018: 1492-1495 - [c28]Pablo Oliveira Antonino, Matthias Jung, Andreas Morgenstern, Florian Faßnacht, Thomas Bauer, Adam Bachorek, Thomas Kuhn, Elisa Yumi Nakagawa:
Enabling Continuous Software Engineering for Embedded Systems Architectures with Virtual Prototypes. ECSA 2018: 115-130 - [c27]Christian Weis, Matthias Jung, Éder F. Zulian, Chirag Sudarshan, Deepak M. Mathew, Norbert Wehn
The Role of Memories in Transprecision Computing. ISCAS 2018: 1-5 - [c26]Kira Kraft, Deepak M. Mathew, Chirag Sudarshan, Matthias Jung, Christian Weis, Norbert Wehn
Efficient coding scheme for DDR4 memory subsystems. MEMSYS 2018: 148-157 - [c25]Matthias Jung, Sally A. McKee, Chirag Sudarshan, Christoph Dropmann, Christian Weis, Norbert Wehn
Driving into the memory wall: the role of memory for advanced driver assistance systems and autonomous driving. MEMSYS 2018: 377-386 - [c24]Jasmin Jahic, Matthias Jung, Thomas Kuhn, Claus Kestel, Norbert Wehn
A Framework for Non-intrusive Trace-driven Simulation of Manycore Architectures with Dynamic Tracing Configuration. RV 2018: 458-468 - [c23]Christoph Dropmann, Eike Thaden, Mario Trapp, Denis Uecker
A Model-Based Safety Analysis of Dependencies Across Abstraction Layers. SAFECOMP 2018: 73-87 - [c22]Jasmin Jahic, Thomas Kuhn, Matthias Jung, Norbert Wehn
BOSMI: a framework for non-intrusive monitoring and testing of embedded multithreaded software on the logical level. SAMOS 2018: 131-138 - [i1]Radhika Jagtap, Matthias Jung, Wendy Elsasser, Christian Weis, Andreas Hansson, Norbert Wehn:
Integrating DRAM Power-Down Modes in gem5 and Quantifying their Impact. CoRR abs/1803.07613 (2018) - 2017
- [j6]Matthias Jung
A Platform to Analyze DDR3 DRAM's Power and Retention Time. IEEE Des. Test 34(4): 52-59 (2017) - [j5]Pei Liu
3D-Stacked Many-Core Architecture for Biological Sequence Analysis Problems. Int. J. Parallel Program. 45(6): 1420-1460 (2017) - [j4]Christian Weis
DRAMSpec: A High-Level DRAM Timing, Power and Area Exploration Tool. Int. J. Parallel Program. 45(6): 1566-1591 (2017) - [j3]Pei Liu
A Customized Many-Core Hardware Acceleration Platform for Short Read Mapping Problems Using Distributed Memory Interface with 3D-Stacked Architecture. J. Signal Process. Syst. 87(3): 327-341 (2017) - [c21]Radhika Jagtap, Matthias Jung, Wendy Elsasser
Integrating DRAM power-down modes in gem5 and quantifying their impact. MEMSYS 2017: 86-95 - [c20]Deepak M. Mathew, Éder F. Zulian, Matthias Jung, Kira Kraft, Christian Weis, Bruce L. Jacob, Norbert Wehn
Using run-time reverse-engineering to optimize DRAM refresh. MEMSYS 2017: 115-124 - [c19]Deepak M. Mathew, Éder F. Zulian, Subash Kannoth, Matthias Jung, Christian Weis, Norbert Wehn:
A Bank-Wise DRAM Power Model for System Simulations. RAPIDO 2017: 5 - [c18]Christian Menard
System simulation with gem5 and SystemC: The keystone for full interoperability. SAMOS 2017: 62-69 - [c17]Matthias Jung, Kira Kraft, Norbert Wehn
A new state model for DRAMs using Petri Nets. SAMOS 2017: 221-226 - [c16]Jasmin Jahic, Thomas Kuhn, Matthias Jung, Norbert Wehn
Supervised testing of concurrent software in embedded systems. SAMOS 2017: 233-238 - 2016
- [j2]Matthias Jung
A cross layer approach for efficient thermal management in 3D stacked SoCs. Microelectron. Reliab. 61: 43-47 (2016) - [c15]Matthias Jung
Efficient reliability management in SoCs - an approximate DRAM perspective. ASP-DAC 2016: 390-394 - [c14]Matthias Jung
Invited - Approximate computing with partially unreliable dynamic random access memory - approximate DRAM. DAC 2016: 100:1-100:4 - [c13]Matthias Jung
ConGen: An Application Specific DRAM Memory Controller Generator. MEMSYS 2016: 257-267 - [c12]Matthias Jung, Carl Christian Rheinländer, Christian Weis, Norbert Wehn:
Reverse Engineering of DRAMs: Row Hammer with Crosshair. MEMSYS 2016: 471-476 - [c11]Matthias Jung, Deepak M. Mathew, Éder F. Zulian, Christian Weis, Norbert Wehn
A new bank sensitive DRAMPower model for efficient design space exploration. PATMOS 2016: 283-288 - [c10]Radhika Jagtap, Stephan Diestelhorst, Andreas Hansson, Matthias Jung, Norbert Wehn:
Exploring system performance using elastic traces: Fast, accurate and portable. SAMOS 2016: 96-105 - 2015
- [j1]Matthias Jung
DRAMSys: A Flexible DRAM Subsystem Design Space Exploration Framework. IPSJ Trans. Syst. LSI Des. Methodol. 8: 63-74 (2015) - [c9]Christian Weis, Matthias Jung, Peter Ehses, Cristiano Santos, Pascal Vivet, Sven Goossens, Martijn Koedam, Norbert Wehn:
Retention time measurements and modelling of bit error rates of WIDE I/O DRAM in MPSoCs. DATE 2015: 495-500 - [c8]Christian Brugger, Valentin Grigorovici, Matthias Jung
A Custom Computing System for Finding Similarties in Complex Networks. ISVLSI 2015: 262-267 - [c7]Christian Weis, Matthias Jung
Thermal Aspects and High-Level Explorations of 3D Stacked DRAMs. ISVLSI 2015: 609-614 - [c6]Matthias Jung
Omitting Refresh: A Case Study for Commodity and Wide I/O DRAMs. MEMSYS 2015: 85-91 - [c5]Omar Naji, Christian Weis, Matthias Jung
A high-level DRAM timing, power and area exploration tool. SAMOS 2015: 149-156 - 2014
- [c4]MohammadSadegh Sadri, Matthias Jung, Christian Weis, Norbert Wehn, Luca Benini:
Energy optimization in 3D MPSoCs with Wide-I/O DRAM using temperature variation aware bank-wise refresh. DATE 2014: 1-4 - [c3]Matthias Jung
Optimized active and power-down mode refresh control in 3D-DRAMs. VLSI-SoC 2014: 1-6 - 2013
- [c2]Matthias Jung
TLM modelling of 3D stacked wide I/O DRAM subsystems: a virtual platform for memory controller design space exploration. RAPIDO 2013: 5:1-5:6 - 2011
- [c1]Christian de Schryver
Energy Efficient Acceleration and Evaluation of Financial Computations towards Real-Time Pricing. KES (4) 2011: 177-186
Coauthor Index
[c54] [c53] [c52] [j12] [j10] [c51] [c50] [i5] [i4] [j9] [c48] [c47] [c46] [c45] [c44] [j8] [c42] [c41] [c40] [c39] [c38] [c37] [i3] [c36] [c35] [c34] [c33] [c32] [c31] [i2] [j7] [c30] [c29] [c27] [c26] [c25] [c24] [c22] [i1] [j6] [j5] [j4] [j3] [c21] [c20] [c19] [c18] [c17] [c16] [j2] [c15] [c14] [c13] [c12] [c11] [c10] [j1] [c9] [c8] [c7] [c6] [c5] [c4] [c3] [c2] [c1]
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last updated on 2024-12-23 19:28 CET by the dblp team
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