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Sandro Rigo
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- affiliation: University of Campinas, Sao Paulo, Brazil
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2020 – today
- 2024
- [c31]Thiago Maltempi
, Sandro Rigo, Márcio Machado Pereira, Hervé Yviquel, Jessé Costa, Guido Araujo:
Combining Compression and Prefetching to Improve Checkpointing for Inverse Seismic Problems in GPUs. Euro-Par (3) 2024: 167-181 - [c30]Pedro Henrique Di Francia Rosso
Integrating Multi-FPGA Acceleration to OpenMP Distributed Computing. IWOMP 2024: 49-63 - [c29]Eduardo G. Cortes, Ana Luiza Vianna, Mikaela Martins, Sandro Rigo, Rafael Kunst
LLMs and Translation: different approaches to localization between Brazilian Portuguese and European Portuguese. PROPOR 2024: 45-55 - 2023
- [i6]Lucas Fernando Souza de Castro, Sandro Rigo:
Relating Edge Computing and Microservices by means of Architecture Approaches and Features, Orchestration, Choreography, and Offloading: A Systematic Literature Review. CoRR abs/2301.07803 (2023) - 2022
- [c28]Hervé Yviquel, Márcio Machado Pereira, Emilio Francesquini
The OpenMP Cluster Programming Model. ICPP Workshops 2022: 17:1-17:11 - [c27]Samuel Cajahuaringa
Ion-Molecule Collision Cross-Section Simulation using Linked-cell and Trajectory Parallelization. SBAC-PAD 2022: 150-159 - [i5]Hervé Yviquel, Márcio Machado Pereira, Emilio Francesquini, Guilherme Valarini, Gustavo Leite, Pedro Henrique Di Francia Rosso, Rodrigo Ceccato, Carla Cusihualpa, Vitoria Dias, Sandro Rigo, Alan Souza, Guido Araujo:
The OpenMP Cluster Programming Model. CoRR abs/2207.05677 (2022) - 2021
- [c26]Vanderson Martins do Rosario, Raphael Zinsly, Sandro Rigo, Edson Borin:
Employing Simulation to Facilitate the Design of Dynamic Binary Translators. SBAC-PAD 2021: 104-113 - 2020
- [c25]Denis Contini, Lucas Fernando Souza de Castro
Simulating Smart Campus Applications in Edge and Fog Computing. SMARTCOMP 2020: 326-331 - [i4]Vanderson Martins do Rosario, Raphael Moreira Zinsly, Sandro Rigo, Edson Borin:
Employing Simulation to Facilitate the Design of Dynamic Code Generators. CoRR abs/2008.13240 (2020) - [i3]Gefersom Lima, Gabriel de Oliveira Ramos, Sandro Rigo, Felipe André Zeiser, Ariane da Silveira:
Binary Segmentation of Seismic Facies Using Encoder-Decoder Neural Networks. CoRR abs/2012.03675 (2020)
2010 – 2019
- 2019
- [c24]Guangyan Hu, Sandro Rigo, Desheng Zhang, Thu D. Nguyen:
Approximation with Error Bounds in Spark. MASCOTS 2019: 61-73 - [i2]Guangyan Hu, Yongfeng Zhang, Sandro Rigo, Thu D. Nguyen:
Similarity Driven Approximation for Text Analytics. CoRR abs/1910.07144 (2019) - 2018
- [c23]Ioannis Manousakis, Iñigo Goiri, Ricardo Bianchini, Sandro Rigo, Thu D. Nguyen:
Uncertainty Propagation in Data Processing Systems. SoCC 2018: 95-106 - [c22]Yubo Qin, Ivan Rodero
Exploring Power Budget Scheduling Opportunities and Tradeoffs for AMR-Based Applications. SBAC-PAD 2018: 57-64 - [i1]Guangyan Hu, Desheng Zhang, Sandro Rigo, Thu D. Nguyen:
Approximation with Error Bounds in Spark. CoRR abs/1812.01823 (2018) - 2017
- [j10]Maxiwell Garcia
HybridVerifier: A Cross-Platform Verification Framework for Instruction Set Simulators. IEEE Embed. Syst. Lett. 9(2): 25-28 (2017) - 2014
- [j9]Leonardo Piga, Reinaldo A. Bergamaschi, Sandro Rigo:
Empirical and analytical approaches for web server power modeling. Clust. Comput. 17(4): 1279-1293 (2014) - [j8]Leonardo Piga, Reinaldo A. Bergamaschi, Maurício Breternitz
Adaptive global power optimization for Web servers. J. Supercomput. 68(3): 1088-1112 (2014) - [c21]João Moreira, Lucas Teixeira, Edson Borin, Sandro Rigo:
Leveraging Optimization Methods for Dynamically Assisted Control-Flow Integrity Mechanisms. SBAC-PAD 2014: 49-56 - 2013
- [c20]Divino Cesar S. Lucas, Rafael Auler, Rafael Dalibera, Sandro Rigo, Edson Borin, Guido Araujo:
Modeling virtual machines misprediction overhead. IISWC 2013: 153-162 - [c19]Leonardo Piga, Gabriel F. T. Gomes, Rafael Auler, Bruno Rosa, Sandro Rigo, Edson Borin:
Assessing computer performance with stocs. ICPE 2013: 315-318 - 2012
- [j7]Bruno C. Albertini
Computational reflection and its application to platform verification. Des. Autom. Embed. Syst. 16(1): 1-17 (2012) - [j6]Reinaldo A. Bergamaschi, Leonardo Piga, Sandro Rigo, Rodolfo Azevedo
Data center power and performance optimization through global selection of P-states and utilization rates. Sustain. Comput. Informatics Syst. 2(4): 198-208 (2012) - [c18]Maxiwell Garcia, Rodolfo Azevedo
Optimizing Simulation in Multiprocessor Platforms Using Dynamic-Compiled Simulation. WSCAD-SSC 2012: 80-87 - [c17]Raphael Moreira Zinsly, Sandro Rigo, Edson Borin:
Compressing Variable-Length Instruction Traces. WSCAD-SSC 2012: 103-109 - 2011
- [j5]Fernando Kronbauer, Sandro Rigo:
Assessing the influence of data access patterns and contention management policies on the performance of software transactional memory systems. Int. J. High Perform. Syst. Archit. 3(2/3): 110-121 (2011) - [c16]Leonardo Piga, Reinaldo A. Bergamaschi, Felipe Klein, Rodolfo Azevedo
Empirical Web server power modeling and characterization. IISWC 2011: 75 - [c15]João Moreira, Felipe Klein, Alexandro Baldassin
Using multiple abstraction levels to speedup an MPSoC virtual platform simulator. International Symposium on Rapid System Prototyping 2011: 99-105 - 2010
- [c14]Felipe Klein, Alexandro Baldassin
STM versus lock-based systems: an energy consumption perspective. ISLPED 2010: 431-436
2000 – 2009
- 2009
- [c13]Gabriel Marcilio, Luiz C. V. dos Santos
A novel verification technique to uncover out-of-order DUV behaviors. DAC 2009: 448-453 - [c12]Emilio Wuerges, Luiz C. V. dos Santos
An early real-time checker for retargetable compile-time analysis. SBCCI 2009 - 2008
- [j4]Alexandro Baldassin
An open-source binary utility generator. ACM Trans. Design Autom. Electr. Syst. 13(2): 27:1-27:17 (2008) - 2007
- [c11]Bruno C. Albertini
A computational reflection mechanism to support platform debugging in SystemC. CODES+ISSS 2007: 81-86 - [c10]Alexandro Baldassin
Automatic Retargeting of Binary Utilities for Embedded Code Generation. ISVLSI 2007: 253-258 - [c9]Richard Maciel, Bruno C. Albertini
A Methodology and Toolset to Enable SystemC and VHDL Co-simulation. ISVLSI 2007: 351-356 - [c8]Fernando Kronbauer, Alexandro Baldassin
A Flexible Platform Framework for Rapid Transactional Memory Systems Prototyping and Evaluation. IEEE International Workshop on Rapid System Prototyping 2007: 123-129 - 2005
- [j3]Cristiano C. de Araújo, Millena Gomes, Edna Barros
Platform designer: An approach for modeling multiprocessor platforms based on SystemC. Des. Autom. Embed. Syst. 10(4): 253-283 (2005) - [j2]Rodolfo Azevedo
The ArchC Architecture Description Language and Tools. Int. J. Parallel Program. 33(5): 453-484 (2005) - [c7]Alexandro Baldassin
Extending the ArchC Language for Automatic Generation of Assemblers. SBAC-PAD 2005: 60-68 - 2004
- [b1]Sandro Rigo:
ArchC: uma linguagem de descrição de arquiteturas. University of Campinas, Brazil, 2004 - [c6]Pablo Viana, Edna Barros
Modeling and Simulating Memory Hierarchies in a Platform-Based Design Methodology. DATE 2004: 734-735 - [c5]Sandro Rigo, Guido Araujo, Marcus Bartholomeu, Rodolfo Azevedo
ArchC: A SystemC-Based Architecture Description Language. SBAC-PAD 2004: 66-73 - [c4]Marcus Bartholomeu, Rodolfo Azevedo
Optimizations for Compiled Simulation Using Instruction Type Information. SBAC-PAD 2004: 74-81 - [c3]Sandro Rigo, Marcio Juliato, Rodolfo Azevedo
Teaching computer architecture using an architecture description language. WCAE 2004: 6 - 2003
- [c2]Pablo Viana, Edna Barros
Exploring Memory Hierarchy with ArchC. SBAC-PAD 2003: 2-9 - 2001
- [j1]Subramanian Rajagopalan, Sreeranga P. Rajan, Sharad Malik
A retargetable VLIW compiler framework for DSPs withinstruction-level parallelism. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 20(11): 1319-1328 (2001) - [c1]Guilherme Ottoni, Sandro Rigo, Guido Araujo, Subramanian Rajagopalan, Sharad Malik:
Optimal Live Range Merge for Address Register Allocation in Embedded Programs. CC 2001: 274-288
Coauthor Index
aka: Guido Araújo
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