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Kaveh Hosseini
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2020 – today
- 2024
- [c7]Yuyang Wang, Songli Wang, Robert Parsons
, Asher Novick, Vignesh Gopal, Kaylx Jang, Anthony Rizzo, Chia-Pin Chiu, Kaveh Hosseini, Tim Tri Hoang, Sergey Y. Shumarayev, Keren Bergman:
Silicon Photonics Chip I/O for Ultra High-Bandwidth and Energy-Efficient Die-to-Die Connectivity. CICC 2024: 1-8 - [c6]Songli Wang, Yuyang Wang, Xiang Meng, Kaveh Hosseini, Tim Tri Hoang, Keren Bergman:
Automated Tuning of Ring-Assisted MZI-Based Interleaver for DWDM Systems. OFC 2024: 1-3 - 2023
- [c5]Vignesh Gopal, Anthony Rizzo, Maarten Hattink, Asher Novick, James Robinson, Kaveh Hosseini, Tim Tri Hoang, Keren Bergman:
Simultaneous Error-Free Data Modulation with Silicon Microdisks in the Multi-FSR Regime for Scalable DWDM Links. OFC 2023: 1-3 - 2022
- [c4]Kaveh Hosseini, Edwin Kok, Sergey Y. Shumarayev, Daniel Jeong, Allen Chan, Austin Katzin, Songtao Liu, Radek Roucka, Manan Raval, Minh Mac, Chia-Pin Chiu, Thungoc Tran, Kumar Abhishek Singh, Sangeeta Raman, Yanjing Ke, Chen Li, Li-Fan Yang, Paulo Chao, Haiwei Lu, Fernando Luna, Xiaoqian Li, Tim Tri Hoang, Arnab Sarkar, Asako Toda, Ravi Mahajan, Nitin Deshpande, Conor O'Keeffe, Uma Krishnamoorthy, Vladimir Stojanovic, Christopher Madden, Chong Zhang, Matt Sysak, Pavan Bhargava, Chen Sun, Mark Wade:
5.12 Tbps Co-Packaged FPGA and Silicon Photonics Interconnect I/O. VLSI Technology and Circuits 2022: 260-261 - 2021
- [c3]Kaveh Hosseini, Edwin Kok, Sergey Y. Shumarayev, Chia-Pin Chiu, Arnab Sarkar, Asako Toda, Yanjing Ke, Allen Chan, Daniel Jeong, Mason Zhang, Sangeeta Raman, Thungoc Tran, Kumar Abhishek Singh, Pavan Bhargava, Chong Zhang, Haiwei Lu, Ravi Mahajan, Xiaoqian Li, Nitin Deshpande, Conor O'Keeffe, Tim Tri Hoang, Uma Krishnamoorthy, Chen Sun, Roy Meade, Vladimir Stojanovic, Mark Wade:
8 Tbps Co-Packaged FPGA and Silicon Photonics Optical IO. OFC 2021: 1-3
2010 – 2019
- 2011
- [j5]Kaveh Hosseini, Brian Fitzgibbon, Michael Peter Kennedy
Observations Concerning the Generation of Spurious Tones in Digital Delta-Sigma Modulators Followed by a Memoryless Nonlinearity. IEEE Trans. Circuits Syst. II Express Briefs 58-II(11): 714-718 (2011) - 2010
- [j4]Kaveh Hosseini, Michael Peter Kennedy
Prediction of the Spectrum of a Digital Delta-Sigma Modulator Followed by a Polynomial Nonlinearity. IEEE Trans. Circuits Syst. I Regul. Pap. 57-I(8): 1905-1913 (2010)
2000 – 2009
- 2009
- [c2]Kieran O'Neill, Brian Fitzgibbon, Kaveh Hosseini, Michael Peter Kennedy
Calculation of cycle lengths in MASH 1-2-2 digital delta sigma modulators with a constant input. ECCTD 2009: 627-630 - [c1]Brian Fitzgibbon, Kieran O'Neill, Andrew Grannell, Ciarán Horgan, Zhipeng Ye, Kaveh Hosseini, Michael Peter Kennedy
A spur-free MASH digital delta-sigma modulator with higher order shaped dither. ECCTD 2009: 723-726 - 2008
- [j3]Kaveh Hosseini, Michael Peter Kennedy
Architectures for Maximum-Sequence-Length Digital Delta-Sigma Modulators. IEEE Trans. Circuits Syst. II Express Briefs 55-II(11): 1104-1108 (2008) - 2007
- [j2]Kaveh Hosseini, Michael Peter Kennedy
Mathematical Analysis of a Prime Modulus Quantizer MASH Digital Delta-Sigma Modulator. IEEE Trans. Circuits Syst. II Express Briefs 54-II(12): 1105-1109 (2007) - [j1]Kaveh Hosseini, Michael Peter Kennedy
Maximum Sequence Length MASH Digital Delta-Sigma Modulators. IEEE Trans. Circuits Syst. I Regul. Pap. 54-I(12): 2628-2638 (2007)
Coauthor Index
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