A 151-mm2 64-Gb 2 Bit/Cell NAND Flash Memory in 24-nm CMOS Technology. - Fukuda, Koichi; Watanabe, Yoshihisa; Makino, Eiichi; Kawakami, Koichi; Sato, Jumpei; Takagiwa, Teruo; Kanagawa, Naoaki; Shiga, Hitoshi; Tokiwa, Naoya; Shindo, Yoshihiko; Ogawa, Takeshi; Edahiro, Toshiaki; et al. (IEEE J. Solid State Circuits, 2012)

A 151mm2 64Gb MLC NAND flash memory in 24nm CMOS technology. - Fukuda, Koichi; Watanabe, Yoshihisa; Makino, Eiichi; Kawakami, Koichi; Sato, Jumpei; Takagiwa, Teruo; Kanagawa, Naoaki; Shiga, Hitoshi; Tokiwa, Naoya; Shindo, Yoshihiko; Edahiro, Toshiaki; Ogawa, Takeshi; et al. (2011)

A 44-mm2 four-bank eight-word page-read 64-Mb flash memory with flexible block redundancy and fast accurate word-line voltage controller. - Tanzawa, Toru; Umezawa, Akira; Taura, Tadayuki; Shiga, Hitoshi; Hara, Tokumasa; Takano, Yoshinori; Miyaba, Takeshi; Tokiwa, Naoya; Watanabe, Kentaro; Watanabe, Hiroshi; Masuda, Kazunori; Naruke, Kiyomi; et al. (IEEE J. Solid State Circuits, 2002)

A 16-Mb flash EEPROM with a new self-data-refresh scheme for a sector erase operation. - Atsumi, Shigeru; Kuriyama, Masao; Umezawa, Akira; Banba, Hironori; Naruke, Kiyomi; Yamada, Seiji; Ohshima, Yoichi; Oshikiri, Masamitsu; Hiura, Yohei; Yamane, Tomoko; Yoshikawa, Kuniyoshi (IEEE J. Solid State Circuits, 1994)

A 5-V-only operation 0.6- mu m flash EEPROM with row decoder scheme in triple-well structure. - Umezawa, Akira; Atsumi, Shigeru; Kuriyama, Masao; Banba, Hironori; Imamiya, Ken-ichi; Naruke, Kiyomi; Yamada, Seiji; Obi, Etsushi; Oshikiri, Masamitsu; Suzuki, Tomoko; Tanaka, Sumio (IEEE J. Solid State Circuits, 1992)