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Seyyed Ahmad Razavi
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2020 – today
- 2022
- [c8]Seyyed Ahmad Razavi, Hsin-Yu Ting, Tootiya Giyahchi, Eli Bozorgzadeh:
On Exploiting Patterns For Robust FPGA-based Multi-accelerator Edge Computing Systems. DATE 2022: 116-119
2010 – 2019
- 2019
- [c7]Seyyed Ahmad Razavi, Eli Bozorgzadeh, Solmaz S. Kia
:
Communication-Computation co-Design of Decentralized Task Chain in CPS Applications. DATE 2019: 1082-1087 - 2018
- [c6]Seyyed Ahmad Razavi, Eli Bozorgzadeh, Kanghee Kim, Solmaz S. Kia
Resource-Aware Decentralization of a UKF-Based Cooperative Localization for Networked Mobile Robots. DSD 2018: 296-303 - 2013
- [c5]Seyyed Ahmad Razavi, Morteza Saheb Zamani
Improving bitstream compression by modifying FPGA architecture. FPGA 2013: 167-170 - 2011
- [c4]Seyyed Hasan Moallempour, Seyyed Ahmad Razavi, Morteza Saheb Zamani
TSV reduction in homogeneous 3D FPGAs by logic resource and input pad replication. 3DIC 2011: 1-5 - 2010
- [c3]Hassan Ebrahimi, Morteza Saheb Zamani
A Switch Box Architecture to Mitigate Bridging and Short Faults in SRAM-Based FPGAs. DFT 2010: 218-224 - [c2]Delasa Aghamirzaie, Seyyed Ahmad Razavi, Morteza Saheb Zamani
Reduction of process variation effect on FPGAs using multiple configurations. VLSI-SoC 2010: 85-90
2000 – 2009
- 2009
- [c1]Seyyed Ahmad Razavi, Morteza Saheb Zamani
A tileable switch module architecture for homogeneous 3D FPGAs. 3DIC 2009: 1-4
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