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Víctor López 0003
Person information
- affiliation: Barcelona Supercomputing Center, Spain
Other persons with the same name
- Víctor López (aka: Victor Lopez) — disambiguation page
- Víctor López 0001 (aka: Victor Lopez 0001) — Telefónica I+D, GTCO, Madrid, Spain
- Víctor López 0002
— University of A Coruña, Spain
- Víctor López 0004 — Autonomous University of Madrid, Spain
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2020 – today
- 2024
- [j2]Joel Criado
Role-shifting threads: Increasing OpenMP malleability to address load imbalance at MPI and OpenMP. Int. J. High Perform. Comput. Appl. 38(2): 94-107 (2024) - [j1]Ahmad Tarraf
Malleability in Modern HPC Systems: Current Experiences, Challenges, and Future Opportunities. IEEE Trans. Parallel Distributed Syst. 35(9): 1551-1564 (2024) - 2023
- [c9]Sebastian Kreutzer, Christian Iwainsky, Marta Garcia-Gasulla, Victor Lopez, Christian H. Bischof:
Runtime-Adaptable Selective Performance Instrumentation. IPDPS Workshops 2023: 423-432 - [i3]Sebastian Kreutzer, Christian Iwainsky, Marta Garcia-Gasulla, Victor Lopez, Christian H. Bischof:
Runtime-Adaptable Selective Performance Instrumentation. CoRR abs/2303.11110 (2023) - 2022
- [c8]Jimmy Aguilar Mena, Omar Shaaban, Victor Lopez, Marta Garcia, Paul M. Carpenter, Eduard Ayguadé, Jesús Labarta:
Transparent load balancing of MPI programs using [email protected] and DLB. ICPP 2022: 55:1-55:11 - [c7]Joel Criado
Exploiting OpenMP Malleability with Free Agent Threads and DLB. ISC Workshops 2022: 162-175 - 2021
- [c6]Víctor López
An OpenMP Free Agent Threads Implementation. IWOMP 2021: 211-225 - [i2]Guillaume Houzeaux, Rosa Maria Badia, Ricard Borrell, Damien Dosimont, Jorge Ejarque, Marta Garcia-Gasulla, Víctor López:
Dynamic resource allocation for efficient parallel CFD simulations. CoRR abs/2112.09560 (2021)
2010 – 2019
- 2018
- [c5]Marco D'Amico
DROM: Enabling Efficient and Effortless Malleability for Resource Managers. ICPP Workshops 2018: 41:1-41:10 - [i1]Marta Garcia-Gasulla, Guillaume Houzeaux, Roger Ferrer, Antoni Artigues, Víctor López, Jesús Labarta, Mariano Vázquez:
MPI+X: task-based parallelization and dynamic load balance of finite element assembly. CoRR abs/1805.03949 (2018) - 2017
- [c4]Michael Wagner
Performance Analysis and Optimization of the FFTXlib on the Intel Knights Landing Architecture. ICPP Workshops 2017: 243-250 - [c3]Víctor López
DJSB: Dynamic Job Scheduling Benchmark. JSSPP 2017: 174-188 - 2013
- [c2]Víctor López
Performance Analysis and Parallelization Strategies in Neuron Simulation Codes. BrainComp 2013: 143-156 - [c1]Dirk Brömmel, Paul Gibbon
Experience with the MPI/STARSS programming model on a large production code. PARCO 2013: 357-366
Coauthor Index
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last updated on 2024-10-21 20:28 CEST by the dblp team
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