VHDL Placement Directives for Parametric IP Blocks - James Hwang; Cameron Patterson; Sujoy Mitra (7th IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM '99), 21-23 April 1999, Napa, CA, USA, 1999)

Hierarchical Placement Directives for Parametric IP Blocks - James Hwang; Cameron Patterson; Sujoy Mitra (Proceedings of the 1999 ACM/SIGDA Seventh International Symposium on Field Programmable Gate Arrays, FPGA 1999, Monterey, CA, USA, February 21-23, 1999, 1999)

Generating Layouts for Self-implementing Modules - James Hwang; Cameron Patterson; S. Mohan; Eric Dellinger; Sujoy Mitra; Ralph Wittig (Field-Programmable Logic and Applications, From FPGAs to Computing Paradigm, 8th International Workshop, FPL'98, Tallinn, Estonia, August 31 - September 3, 1998, Proceedings, 1998)

Substrate-aware mixed-signal macrocell placement in WRIGHT - Sujoy Mitra; Rob A. Rutenbar; L. Richard Carley; David J. Allstot (IEEE J. Solid State Circuits, 1995)

Testability-oriented channel routing - Jitendra Khare; Sujoy Mitra; Pranab K. Nag; U. Maly; Rob A. Rutenbar (8th International Conference on VLSI Design (VLSI Design 1995), 4-7 January 1995, New Delhi, India, 1995)

System-level routing of mixed-signal ASICs in WREN - Sujoy Mitra; Sudip Nag; Rob A. Rutenbar; L. Richard Carley (1992 IEEE/ACM International Conference on Computer-Aided Design, ICCAD 1992, Santa Clara, CA, USA, November 8-12, 1992. Digest of Technical Papers, 1992)