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Daniel A. Connors
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- affiliation: University of Colorado, USA
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2010 – 2019
- 2015
- [c40]Dan Connors, Kyle Dunn, Ryan Bueter:
PyCompArch: python-based modules for exploring computer architecture concepts. WCAE 2015: 4:1-4:6 - 2014
- [c39]Dan Connors, Skyler Saleh, Tejas Joshi, Ryan Bueter:
Data-driven techniques to overcome workload disparity. IA3@SC 2014: 41-48 - 2013
- [c38]Dan Connors, Eric Grover, Blake Caldwell
:
Exploring alternative flexible OpenCL (FlexCL) core designs in FPGA-based MPSoC systems. RAPIDO 2013: 3:1-3:8 - 2012
- [j10]Stefan P. Muszala, Gita Alaghband, James J. Hack, Daniel A. Connors:
Natural Load Indices (NLI) for scientific simulation. J. Supercomput. 59(1): 392-413 (2012) - 2011
- [c37]Allison Gehrke, Ilkyeun Ra, Daniel A. Connors:
A Framework for Automated Performance Tuning and Code Verification on GPU Computing Platforms. IPDPS Workshops 2011: 2113-2116 - 2010
- [c36]Sudeep Pasricha, Yong Zou, Dan Connors, Howard Jay Siegel:
OE+IOE: a novel turn model based fault tolerant routing scheme for networks-on-chip. CODES+ISSS 2010: 85-94 - [c35]Allison Gehrke, Katherine Rennie, Timothy Benke
Modeling Ion Channel Kinetics with HPC. HPCC 2010: 562-567
2000 – 2009
- 2009
- [j9]Hillery C. Hunter, Erik M. Nystrom, Daniel A. Connors, Wen-mei W. Hwu:
Hardware-compiler co-design for adjustable data power savings. Microprocess. Microsystems 33(4): 244-253 (2009) - [j8]Alex Shye, Joseph Blomstedt, Tipp Moseley, Vijay Janapa Reddi, Daniel A. Connors:
PLR: A Software Approach to Transient Fault Tolerance for Multicore Architectures. IEEE Trans. Dependable Secur. Comput. 6(2): 135-148 (2009) - [c34]Justin Emile Gottschlich, Jeremy G. Siek
An efficient lock-aware transactional memory implementation. ICOOOLPS@ECOOP 2009: 10-17 - 2008
- [c33]Justin Emile Gottschlich, Daniel A. Connors:
Optimizing consistency checking for memory-intensive transactions. PODC 2008: 451 - 2007
- [c32]Dan Fay, Alex Shye, Sayantan Bhattacharya, Daniel A. Connors, Steve Wichmann:
An Adaptive Fault-Tolerant Memory System for FPGA-based Architectures in the Space Environment. AHS 2007: 250-257 - [c31]Tipp Moseley, Daniel A. Connors, Dirk Grunwald, Ramesh Peri:
Identifying potential parallelism via loop-centric profiling. Conf. Computing Frontiers 2007: 143-152 - [c30]Vijay Janapa Reddi, Dan Connors, Robert Cohn, Michael D. Smith:
Persistent Code Caching: Exploiting Code Reuse Across Executions and Applications. CGO 2007: 74-88 - [c29]Alex Shye, Tipp Moseley, Vijay Janapa Reddi, Joseph Blomstedt, Daniel A. Connors:
Using Process-Level Redundancy to Exploit Multiple Cores for Transient Fault Tolerance. DSN 2007: 297-306 - [c28]Joshua L. Kihm, Samuel D. Strom, Daniel A. Connors:
Phase-Guided Small-Sample Simulation. ISPASS 2007: 84-93 - [c27]Dan Fay, Scott Campbell, Greg Miller, Dan Connors:
Teaching Fault Tolerant FPGA Design for Aerospace Applications. MSE 2007: 61-62 - 2006
- [j7]Alex Settle, Dan Connors, Enric Gibert, Antonio González:
A dynamically reconfigurable cache for multithreaded processors. J. Embed. Comput. 2(2): 221-233 (2006) - [j6]Qiang Wu, Margaret Martonosi, Douglas W. Clark, Vijay Janapa Reddi, Dan Connors, Youfeng Wu, Jin Lee, David M. Brooks:
Dynamic-Compiler-Driven Control for Microprocessor Energy and Performance. IEEE Micro 26(1): 119-129 (2006) - [c26]David A. Penry, Daniel Fay, David Hodgdon, Ryan Wells, Graham Schelle, David I. August, Dan Connors:
Exploiting parallelism and structure to accelerate the simulation of chip multi-processors. HPCA 2006: 29-40 - [c25]Hassan Al-Sukhni, James Holt, Daniel A. Connors:
Improved stride prefetching using extrinsic stream characteristics. ISPASS 2006: 166-176 - 2005
- [j5]Joshua L. Kihm, Alex Settle, Andrew Janiszewski, Dan Connors:
Understanding the Impact of Inter-Thread Cache Interference on ILP in Modern SMT Processors. J. Instr. Level Parallelism 7 (2005) - [j4]Neil Vachharajani, Matthew Iyer, Chinmay Ashok, Manish Vachharajani, David I. August, Daniel A. Connors:
Chip multi-processor scalability for single-threaded applications. SIGARCH Comput. Archit. News 33(4): 44-53 (2005) - [j3]Vijay Janapa Reddi, Dan Connors, Robert S. Cohn:
Persistence in dynamic code transformation systems. SIGARCH Comput. Archit. News 33(5): 69-74 (2005) - [c24]Alex Shye, Matthew Iyer, Tipp Moseley, David Hodgdon, Dan Fay, Vijay Janapa Reddi, Daniel A. Connors:
Analysis of path profiling information generated with performance monitoring hardware. Interaction between Compilers and Computer Architectures 2005: 34-43 - [c23]Alex Shye, Matthew Iyer, Vijay Janapa Reddi, Daniel A. Connors:
Code coverage testing using hardware performance monitoring support. AADEBUG 2005: 159-163 - [c22]Tipp Moseley, Alex Shye, Vijay Janapa Reddi, Matthew Iyer, Dan Fay, David Hodgdon, Joshua L. Kihm, Alex Settle, Dirk Grunwald, Daniel A. Connors:
Dynamic run-time architecture techniques for enabling continuous optimization. Conf. Computing Frontiers 2005: 211-220 - [c21]Tipp Moseley, Dirk Grunwald, Joshua L. Kihm, Daniel A. Connors:
Methods for Modeling Resource Contention on Simultaneous Multithreading Processors. ICCD 2005: 373-380 - [c20]Matthew Ouellette, Daniel A. Connors:
Analysis of Hardware Acceleration in Reconfigurable Embedded Systems. IPDPS 2005 - [c19]Joshua L. Kihm, Daniel A. Connors:
Statistical Simulation of Multithreaded Architectures. MASCOTS 2005: 67-74 - [c18]Qiang Wu, Margaret Martonosi, Douglas W. Clark, Vijay Janapa Reddi, Dan Connors, Youfeng Wu, Jin Lee, David M. Brooks:
A Dynamic Compilation Framework for Controlling Microprocessor Energy and Performance. MICRO 2005: 271-282 - 2004
- [c17]Alex Settle, Joshua L. Kihm, Andrew Janiszewski, Daniel A. Connors:
Architectural Support for Enhanced SMT Job Scheduling. IEEE PACT 2004: 63-73 - [c16]Stefan P. Muszala, Gita Alaghband, Daniel A. Connors, James J. Hack:
A VFSA Scheduler for Radiative Transfer Data in Climate Models. PDCS 2004: 64-71 - [c15]Joshua L. Kihm, Andrew Janiszewski, Daniel A. Connors:
Predictable Fine-Grained Cache Behavior for Enhanced Simultaneous Multithreading (SMT) Scheduling. CCCT (1) 2004: 405-409 - [c14]Joshua L. Kihm, Daniel A. Connors:
Implementation of Fine-Grained Cache Monitoring for Improved SMT Scheduling. ICCD 2004: 326-331 - [c13]Vijay Janapa Reddi, Alex Settle, Daniel A. Connors, Robert S. Cohn:
PIN: a binary instrumentation tool for computer architecture research and education. WCAE 2004: 22 - 2003
- [c12]Ravikrishnan Sree, Alex Settle, Ian Bratt, Daniel A. Connors:
Compiler-Directed Resource Management for Active Code Regions. Interaction between Compilers and Computer Architectures 2003: 85-94 - [c11]Hassan Al-Sukhni, Ian Bratt, Daniel A. Connors:
Compiler-Directed Content-Aware Prefetching for Dynamic Data Structures. IEEE PACT 2003: 91-100 - [c10]Alex Settle, Daniel A. Connors, Gerolf Hoflehner, Daniel M. Lavery:
Optimization for the Intel® Itanium ®Architectur Register Stack. CGO 2003: 115-124 - [c9]Andreas Hagen, Daniel A. Connors, Bryan L. Pellom:
The analysis and design of architecture systems for speech recognition on modern handheld-computing devices. CODES+ISSS 2003: 65-70 - 2000
- [b1]Daniel A. Connors:
Eliminating Dynamic Computation Redundancy. University of Illinois Urbana-Champaign, USA, 2000 - [c8]Daniel A. Connors, Hillery C. Hunter, Ben-Chung Cheng, Wen-mei W. Hwu:
Hardware Support for Dynamic Management of Compiler-Directed Computation Reuse. ASPLOS 2000: 222-233
1990 – 1999
- 1999
- [j2]Teresa L. Johnson, Daniel A. Connors, Matthew C. Merten, Wen-mei W. Hwu:
Run-Time Cache Bypassing. IEEE Trans. Computers 48(12): 1338-1354 (1999) - [c7]Daniel A. Connors, Jean-Michel Puiatti, David I. August, Kevin M. Crozier, Wen-mei W. Hwu:
An Architecture Framework for Introducing Predicated Execution into Embedded Microprocessors. Euro-Par 1999: 1301-1311 - [c6]David I. August, John W. Sias, Jean-Michel Puiatti, Scott A. Mahlke, Daniel A. Connors, Kevin M. Crozier, Wen-mei W. Hwu:
The Program Decision Logic Approach to Predicated Execution. ISCA 1999: 208-219 - [c5]Daniel A. Connors, Wen-mei W. Hwu:
Compiler-Directed Dynamic Computation Reuse: Rationale and Initial Results. MICRO 1999: 158-169 - [r1]Daniel A. Connors, Wen-mei W. Hwu:
Architecture. The VLSI Handbook 1999 - 1998
- [c4]Teresa L. Johnson, Daniel A. Connors, Wen-mei W. Hwu:
Run-Time Adaptive Cache Management. HICSS (7) 1998: 774-775 - [c3]David I. August, Daniel A. Connors, Scott A. Mahlke, John W. Sias, Kevin M. Crozier, Ben-Chung Cheng, Patrick R. Eaton, Qudus B. Olaniran, Wen-mei W. Hwu:
Integrated Predicated and Speculative Execution in the IMPACT EPIC Architecture. ISCA 1998: 227-237 - [c2]Ben-Chung Cheng, Daniel A. Connors, Wen-mei W. Hwu:
Compiler-Directed Early Load-Address Generation. MICRO 1998: 138-147 - 1997
- [c1]David I. August, Daniel A. Connors, John C. Gyllenhaal, Wen-mei W. Hwu:
Architectural Support for Compiler-Synthesized Dynamic Branch Prediction Strategies: Rationale and Initial Results. HPCA 1997: 84-93 - 1994
- [j1]Dan Connors, Gerry Feigin, David D. Yao:
Scheduling semiconductor lines using a fluid network model. IEEE Trans. Robotics Autom. 10(2): 88-98 (1994)
Coauthor Index
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