default search action

combined dblp search
author search
venue search
publication search

ask others

"The Demonstration of Gate Dielectric-fuse 4kb OTP Memory Feasible for ..."

E. R. Hsieh et al. (2019)

> Home

Details and statistics

DOI: 10.23919/VLSIC.2019.8778094

access: closed

type: Conference or Workshop Paper

metadata version: 2019-08-05

- view
  - electronic edition via DOI
  - unpaywalled version
  authority control:
- export record
  dblp key:
  - conf/vlsic/HsiehCCCC19
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/conf/vlsic/HsiehCCCC19
E. R. Hsieh, C. W. Chang, C. C. Chuang, H. W. Chen, Steve S. Chung:
The Demonstration of Gate Dielectric-fuse 4kb OTP Memory Feasible for Embedded Applications in High-k Metal-gate CMOS Generations and Beyond. VLSI Circuits 2019: 208-

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.