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"Leakage Power Reduction in Dual-Vdd and Dual-Vth Designs through ..."
Aswath Oruganti, Nagarajan Ranganathan (2006)
- Aswath Oruganti, Nagarajan Ranganathan:
Leakage Power Reduction in Dual-Vdd and Dual-Vth Designs through Probabilistic Analysis of Vth Variation. VLSI Design 2006: 766-769
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