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"A timing-driven synthesis of arithmetic circuits using carry-save-adders ..."

Taewhan Kim, Junhyung Um (2000)

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DOI: 10.1145/368434.368656

access: closed

type: Conference or Workshop Paper

metadata version: 2024-12-14

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  dblp key:
  - conf/aspdac/KimU00
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  persistent URL:
  - https://dblp.org/rec/conf/aspdac/KimU00
Taewhan Kim, Junhyung Um:
A timing-driven synthesis of arithmetic circuits using carry-save-adders (short paper). ASP-DAC 2000: 313-316

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