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"A 90nm CMOS digital PLL based on Vernier-Gated-Ring-Oscillator ..."

Ping Lu, Ying Wu, Pietro Andreani (2012)

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DOI: 10.1109/ISCAS.2012.6271835

access: closed

type: Conference or Workshop Paper

metadata version: 2018-03-08

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Ping Lu, Ying Wu, Pietro Andreani:
A 90nm CMOS digital PLL based on Vernier-Gated-Ring-Oscillator Time-to-Digital Converter. ISCAS 2012: 2593-2596

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