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"Application of Hardware Architecture of Genetic Algorithm for Optimal ..."

Rong-Hou Wu et al. (2006)

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DOI: 10.2991/JCIS.2006.299

access: open

type: Conference or Workshop Paper

metadata version: 2021-02-10

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  dblp key:
  - conf/jcis/WuLSTCW06
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  - https://dblp.org/rec/conf/jcis/WuLSTCW06
Rong-Hou Wu, Yang-Han Lee, Shiann-Tsong Sheu, Hsien-Wei Tseng, Ming-Hsueh Chuang, Yung-Kuang Wang:
Application of Hardware Architecture of Genetic Algorithm for Optimal Packet Scheduling. JCIS 2006

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