default search action

combined dblp search
author search
venue search
publication search

ask others

"Performance-Aware Interconnect Delay Insertion Against EM Side-Channel ..."

Minmin Jiang, Vasilis F. Pavlidis (2021)

> Home

Details and statistics

DOI: 10.1109/SLIP52707.2021.00013

access: closed

type: Conference or Workshop Paper

metadata version: 2022-01-21

- view
  - electronic edition via DOI
  - unpaywalled version
  authority control:
- export record
  dblp key:
  - conf/slip/JiangP21
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/conf/slip/JiangP21
Minmin Jiang, Vasilis F. Pavlidis:
Performance-Aware Interconnect Delay Insertion Against EM Side-Channel Attacks. SLIP 2021: 25-32

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.