default search action

combined dblp search
author search
venue search
publication search

ask others

"An efficient and high-speed VLSI implementation of optimal normal basis ..."

Bahram Rashidi, Sayed Masoud Sayedi, Reza Rezaeian Farashahi (2016)

> Home

Details and statistics

DOI: 10.1016/J.VLSI.2016.05.006

access: closed

type: Journal Article

metadata version: 2020-02-20

- view
  - electronic edition via DOI
  - unpaywalled version
  authority control:
- export record
  dblp key:
  - journals/integration/RashidiSF16
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/journals/integration/RashidiSF16
Bahram Rashidi, Sayed Masoud Sayedi, Reza Rezaeian Farashahi:
An efficient and high-speed VLSI implementation of optimal normal basis multiplication over GF(2^m). Integr. 55: 138-154 (2016)

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.