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"A Hardware/Software Partitioning Algorithm for Processor Cores with Packed ..."

Nozomu Togawa et al. (2003)

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DOI: —

access: closed

type: Journal Article

metadata version: 2021-06-08

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  - https://dblp.org/rec/journals/ieiceta/TogawaTMYO03
Nozomu Togawa, Koichi Tachikake, Yuichiro Miyaoka, Masao Yanagisawa, Tatsuo Ohtsuki:
A Hardware/Software Partitioning Algorithm for Processor Cores with Packed SIMD-Type Instructions. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 86-A(12): 3218-3224 (2003)

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